Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 1 | /* |
Sujith Manoharan | 5b68138 | 2011-05-17 13:36:18 +0530 | [diff] [blame] | 2 | * Copyright (c) 2008-2011 Atheros Communications Inc. |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ANI_H |
| 18 | #define ANI_H |
| 19 | |
| 20 | #define HAL_PROCESS_ANI 0x00000001 |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 21 | |
Felix Fietkau | 093115b | 2010-10-04 20:09:47 +0200 | [diff] [blame] | 22 | #define DO_ANI(ah) (((ah)->proc_phyerr & HAL_PROCESS_ANI) && ah->curchan) |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 23 | |
Vasanthakumar Thiagarajan | 22e66a4 | 2009-08-19 16:23:40 +0530 | [diff] [blame] | 24 | #define BEACON_RSSI(ahp) (ahp->stats.avgbrssi) |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 25 | |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 26 | /* units are errors per second */ |
Felix Fietkau | 465dce6 | 2012-06-15 15:25:24 +0200 | [diff] [blame] | 27 | #define ATH9K_ANI_OFDM_TRIG_HIGH 3500 |
Rajkumar Manoharan | 54da20d | 2012-03-15 05:34:26 +0530 | [diff] [blame] | 28 | #define ATH9K_ANI_OFDM_TRIG_HIGH_BELOW_INI 1000 |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 29 | |
| 30 | /* units are errors per second */ |
Felix Fietkau | 465dce6 | 2012-06-15 15:25:24 +0200 | [diff] [blame] | 31 | #define ATH9K_ANI_OFDM_TRIG_LOW 400 |
Rajkumar Manoharan | 54da20d | 2012-03-15 05:34:26 +0530 | [diff] [blame] | 32 | #define ATH9K_ANI_OFDM_TRIG_LOW_ABOVE_INI 900 |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 33 | |
| 34 | /* units are errors per second */ |
Felix Fietkau | 465dce6 | 2012-06-15 15:25:24 +0200 | [diff] [blame] | 35 | #define ATH9K_ANI_CCK_TRIG_HIGH 600 |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 36 | |
| 37 | /* units are errors per second */ |
Felix Fietkau | 465dce6 | 2012-06-15 15:25:24 +0200 | [diff] [blame] | 38 | #define ATH9K_ANI_CCK_TRIG_LOW 300 |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 39 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 40 | #define ATH9K_ANI_NOISE_IMMUNE_LVL 4 |
| 41 | #define ATH9K_ANI_USE_OFDM_WEAK_SIG true |
| 42 | #define ATH9K_ANI_CCK_WEAK_SIG_THR false |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 43 | |
Felix Fietkau | 465dce6 | 2012-06-15 15:25:24 +0200 | [diff] [blame] | 44 | #define ATH9K_ANI_SPUR_IMMUNE_LVL 3 |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 45 | |
Felix Fietkau | 465dce6 | 2012-06-15 15:25:24 +0200 | [diff] [blame] | 46 | #define ATH9K_ANI_FIRSTEP_LVL 2 |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 47 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 48 | #define ATH9K_ANI_RSSI_THR_HIGH 40 |
| 49 | #define ATH9K_ANI_RSSI_THR_LOW 7 |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 50 | |
Felix Fietkau | 465dce6 | 2012-06-15 15:25:24 +0200 | [diff] [blame] | 51 | #define ATH9K_ANI_PERIOD 300 |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 52 | |
| 53 | /* in ms */ |
Felix Fietkau | 465dce6 | 2012-06-15 15:25:24 +0200 | [diff] [blame] | 54 | #define ATH9K_ANI_POLLINTERVAL 1000 |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 55 | |
| 56 | #define HAL_NOISE_IMMUNE_MAX 4 |
| 57 | #define HAL_SPUR_IMMUNE_MAX 7 |
| 58 | #define HAL_FIRST_STEP_MAX 2 |
| 59 | |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 60 | #define ATH9K_SIG_FIRSTEP_SETTING_MIN 0 |
| 61 | #define ATH9K_SIG_FIRSTEP_SETTING_MAX 20 |
| 62 | #define ATH9K_SIG_SPUR_IMM_SETTING_MIN 0 |
| 63 | #define ATH9K_SIG_SPUR_IMM_SETTING_MAX 22 |
| 64 | |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 65 | /* values here are relative to the INI */ |
| 66 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 67 | enum ath9k_ani_cmd { |
| 68 | ATH9K_ANI_PRESENT = 0x1, |
| 69 | ATH9K_ANI_NOISE_IMMUNITY_LEVEL = 0x2, |
| 70 | ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION = 0x4, |
| 71 | ATH9K_ANI_CCK_WEAK_SIGNAL_THR = 0x8, |
| 72 | ATH9K_ANI_FIRSTEP_LEVEL = 0x10, |
| 73 | ATH9K_ANI_SPUR_IMMUNITY_LEVEL = 0x20, |
| 74 | ATH9K_ANI_MODE = 0x40, |
| 75 | ATH9K_ANI_PHYERR_RESET = 0x80, |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 76 | ATH9K_ANI_MRC_CCK = 0x100, |
| 77 | ATH9K_ANI_ALL = 0xfff |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 78 | }; |
| 79 | |
| 80 | struct ath9k_mib_stats { |
| 81 | u32 ackrcv_bad; |
| 82 | u32 rts_bad; |
| 83 | u32 rts_good; |
| 84 | u32 fcs_bad; |
| 85 | u32 beacons; |
| 86 | }; |
| 87 | |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 88 | /* INI default values for ANI registers */ |
| 89 | struct ath9k_ani_default { |
| 90 | u16 m1ThreshLow; |
| 91 | u16 m2ThreshLow; |
| 92 | u16 m1Thresh; |
| 93 | u16 m2Thresh; |
| 94 | u16 m2CountThr; |
| 95 | u16 m2CountThrLow; |
| 96 | u16 m1ThreshLowExt; |
| 97 | u16 m2ThreshLowExt; |
| 98 | u16 m1ThreshExt; |
| 99 | u16 m2ThreshExt; |
| 100 | u16 firstep; |
| 101 | u16 firstepLow; |
| 102 | u16 cycpwrThr1; |
| 103 | u16 cycpwrThr1Ext; |
| 104 | }; |
| 105 | |
Sujith | ee6e8d1 | 2009-02-09 13:29:49 +0530 | [diff] [blame] | 106 | struct ar5416AniState { |
| 107 | struct ath9k_channel *c; |
| 108 | u8 noiseImmunityLevel; |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 109 | u8 ofdmNoiseImmunityLevel; |
| 110 | u8 cckNoiseImmunityLevel; |
| 111 | bool ofdmsTurn; |
Rajkumar Manoharan | 81b67fd6 | 2012-06-21 20:33:59 +0530 | [diff] [blame] | 112 | u8 mrcCCK; |
Sujith | ee6e8d1 | 2009-02-09 13:29:49 +0530 | [diff] [blame] | 113 | u8 spurImmunityLevel; |
| 114 | u8 firstepLevel; |
Felix Fietkau | 7067e70 | 2012-06-15 15:25:21 +0200 | [diff] [blame] | 115 | u8 ofdmWeakSigDetect; |
Sujith | ee6e8d1 | 2009-02-09 13:29:49 +0530 | [diff] [blame] | 116 | u8 cckWeakSigThreshold; |
| 117 | u32 listenTime; |
Sujith | ee6e8d1 | 2009-02-09 13:29:49 +0530 | [diff] [blame] | 118 | int32_t rssiThrLow; |
| 119 | int32_t rssiThrHigh; |
Sujith | ee6e8d1 | 2009-02-09 13:29:49 +0530 | [diff] [blame] | 120 | u32 ofdmPhyErrCount; |
| 121 | u32 cckPhyErrCount; |
Sujith | ee6e8d1 | 2009-02-09 13:29:49 +0530 | [diff] [blame] | 122 | int16_t pktRssi[2]; |
| 123 | int16_t ofdmErrRssi[2]; |
| 124 | int16_t cckErrRssi[2]; |
Luis R. Rodriguez | e36b27a | 2010-06-12 00:33:45 -0400 | [diff] [blame] | 125 | struct ath9k_ani_default iniDef; |
Sujith | ee6e8d1 | 2009-02-09 13:29:49 +0530 | [diff] [blame] | 126 | }; |
| 127 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 128 | struct ar5416Stats { |
| 129 | u32 ast_ani_niup; |
| 130 | u32 ast_ani_nidown; |
| 131 | u32 ast_ani_spurup; |
| 132 | u32 ast_ani_spurdown; |
| 133 | u32 ast_ani_ofdmon; |
| 134 | u32 ast_ani_ofdmoff; |
| 135 | u32 ast_ani_cckhigh; |
| 136 | u32 ast_ani_ccklow; |
| 137 | u32 ast_ani_stepup; |
| 138 | u32 ast_ani_stepdown; |
| 139 | u32 ast_ani_ofdmerrs; |
| 140 | u32 ast_ani_cckerrs; |
| 141 | u32 ast_ani_reset; |
Mohammed Shafi Shajakhan | 107021c | 2011-08-26 11:19:57 +0530 | [diff] [blame] | 142 | u32 ast_ani_lneg_or_lzero; |
Vasanthakumar Thiagarajan | 22e66a4 | 2009-08-19 16:23:40 +0530 | [diff] [blame] | 143 | u32 avgbrssi; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 144 | struct ath9k_mib_stats ast_mibstats; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 145 | }; |
Sujith | 2660b81 | 2009-02-09 13:27:26 +0530 | [diff] [blame] | 146 | #define ah_mibStats stats.ast_mibstats |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 147 | |
Sujith | cbe61d8 | 2009-02-09 13:27:12 +0530 | [diff] [blame] | 148 | void ath9k_enable_mib_counters(struct ath_hw *ah); |
| 149 | void ath9k_hw_disable_mib_counters(struct ath_hw *ah); |
Sujith | cbe61d8 | 2009-02-09 13:27:12 +0530 | [diff] [blame] | 150 | void ath9k_hw_ani_setup(struct ath_hw *ah); |
Luis R. Rodriguez | f637cfd | 2009-08-03 12:24:46 -0700 | [diff] [blame] | 151 | void ath9k_hw_ani_init(struct ath_hw *ah); |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 152 | |
| 153 | #endif /* ANI_H */ |