tree 9c9292e44d473ed9168d0d4b023b4fbcd08bc4bd
parent 2ea659a9ef488125eb46da6eb571de5eae5c43f6
author Jarkko Nikula <jarkko.nikula@linux.intel.com> 1496154681 +0300
committer Mark Brown <broonie@kernel.org> 1496775675 +0100

spi: pxa2xx: Add support for Intel Cannonlake

Intel Cannonlake LPSS SPI has up to four chip selects per port like in
Broxton and is clocked like Sunrisepoint and Kaby Lake. Add a new type
LPSS_CNL_SSP and configuration that enable runtime chip select detection
and use the same FIFO thresholds than in Sunrisepoint.

Patch adds support for both Cannonlake SoC and PCH.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>