| commit | f713c6bf32092a259d6baf2be24f9c3dbf2462c3 | [log] [tgz] |
|---|---|---|
| author | Jon Mason <jonmason@broadcom.com> | Thu Oct 15 15:48:29 2015 -0400 |
| committer | Stephen Boyd <sboyd@codeaurora.org> | Wed Oct 21 17:02:57 2015 -0700 |
| tree | 175ddb6a03c3187d358f50f201f22076fc47db46 | |
| parent | 7968d24107f5a50a11792f8a7f011877e7470dfa [diff] |
clk: iproc: Split off dig_filter The PLL loop filter/gain can be located in a separate register on some SoCs. Split these off into a separate variable, so that an offset can be added if necessary. Also, make the necessary modifications to the Cygnus and NSP drivers for this change. Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>