tree ff47035d9a9b35c2b1aab591a26a8eb68eb396cf
parent 7936e914f7b0827c2dcfe63fbefdc21de2d61dcb
author Jean-Philippe Brucker <jean-philippe.brucker@arm.com> 1443703635 +0100
committer Marc Zyngier <marc.zyngier@arm.com> 1444428712 +0100

irqchip/gic-v3: Change unsigned types for AArch32 compatibility

This patch does a few simple compatibility-related changes:
- change the system register access prototypes to their actual size,
- homogenise mpidr accesses with unsigned long,
- force the 64bit register values to unsigned long long.

Note: the list registers are 64bit on GICv3, but the AArch32 vGIC driver
will need to split their values into two 32bit registers: LRn and LRCn.

Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>