| commit | 9726f347f82b0ce802530deb00ee2dde369e1d2f | [log] [tgz] |
|---|---|---|
| author | Emmanuel Grumbach <emmanuel.grumbach@intel.com> | Tue Jun 29 11:29:49 2010 -0700 |
| committer | Wey-Yi Guy <wey-yi.w.guy@intel.com> | Fri Jul 09 10:17:24 2010 -0700 |
| tree | c34f85766da18b444c08465b8c0bc96c6e2c8e68 | |
| parent | 41691de32664f06507c24cea499b307624e3183e [diff] |
iwlagn: fix the bit mask of a FH register in stop Tx DMA flow When we stop the Tx DMA channels, we poll bits 16:31 in FH_TSSR_RX_STATUS_REG. From 4965 and up, only the bits 16:26 are legal. Bits 27:31 are not used and are always unset. Polling them will lead to fail on timeout but since the timeout is quite small, the stall was not felt. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>