tree 04d2258310b91f54c3c595ff7d3a90b5447f1d6d
parent 77a5b3701832801619dc13d3e902fd8a216e531b
author Philippe Rétornaz <philippe.retornaz@epfl.ch> 1338282389 +0200
committer Samuel Ortiz <sameo@linux.intel.com> 1341785767 +0200

mfd: mc13xxx workaround SPI hardware bug on i.Mx

The MC13xxx PMIC is mainly used on i.Mx SoC. On those SoC the SPI
hardware will deassert CS line as soon as the SPI FIFO is empty.
The MC13xxx hardware is very sensitive to CS line change as it
corrupts the transfer if CS is deasserted in the middle of a register
read or write.
It is not possible to use the CS line as a GPIO on some SoC, so we
need to workaround this by implementing a single SPI transfer to
access the PMIC.

Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Philippe Rétornaz <philippe.retornaz@epfl.ch>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>