tree 750f6cf76959a64592223b32d11883bb04b8aba1
parent ae4b3fbc7a91ea4e5685edb0310bb185a12e5943
author Dale Farnsworth <dale@farnsworth.org> 1178931324 +1000
committer Paul Mackerras <paulus@samba.org> 1178933569 +1000

[POWERPC] Add interrupt support for Marvell mv64x60 chips

There are 3 interrupt groups each with its own status/mask registers.
We use a separate struct irq_chip for each interrupt group and handle
interrupts in two stages or levels: level 1 selects the appropriate
struct irq_chip, and level 2 selects individual interrupts within
that irq_chip.

Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>