commit e4156ee52fe617c2c2d80b5db993ff4bf07d7c3c
author Paul Walmsley <paul@pwsan.com> Tue Dec 21 21:05:15 2010 -0700
committer Paul Walmsley <paul@pwsan.com> Tue Dec 21 21:05:15 2010 -0700
tree 5a2dca04df22b5eac3d5f1af4e39246ae32c5daf
parent b170fbe1f9f1aa38773b1bcf064ab65951ce739d

OMAP4: CM instances: add clockdomain register offsets

In OMAP4 CM instances, some registers (CM_CLKSTCTRL, CM_STATICDEP,
CM_DYNAMICDEP, and the module-specific registers underneath) are
organized by clockdomain.  Add the clockdomain offset macros to the
appropriate PRCM module header files.

This data was almost completely autogenerated from the TI hardware
database; the autogeneration scripts have been updated.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

arch/arm/mach-omap2/cm1_44xx.h

diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h
index 63ef9e3..e2d7a56 100644
--- a/arch/arm/mach-omap2/cm1_44xx.h
+++ b/arch/arm/mach-omap2/cm1_44xx.h
@@ -40,6 +40,11 @@
 #define OMAP4430_CM1_RESTORE_INST	0x0e00
 #define OMAP4430_CM1_INSTR_INST		0x0f00
 
+/* CM1 clockdomain register offsets (from instance start) */
+#define OMAP4430_CM1_ABE_ABE_CDOFFS		0x0000
+#define OMAP4430_CM1_MPU_MPU_CDOFFS		0x0000
+#define OMAP4430_CM1_TESLA_TESLA_CDOFFS		0x0000
+
 /* CM1 */
 
 /* CM1.OCP_SOCKET_CM1 register offsets */