| commit | ccc077292733f3143b444255fa5ec49a8ff2763b | [log] [tgz] |
|---|---|---|
| author | Thomas Breitung <thomas.breitung@izt-labs.de> | Mon Jun 19 16:40:04 2017 +0200 |
| committer | Vinod Koul <vinod.koul@intel.com> | Thu Jun 22 18:31:35 2017 +0530 |
| tree | f867c7838c806b891adcb7e3c955d5e8bbe74817 | |
| parent | 036e9ef8becde736e693be4f4bef56d5b56fc298 [diff] |
dmaengine: fsldma: set BWC, DAHTS and SAHTS values correctly The bits of BWC, DAHTS and SAHTS in the DMA mode register must be cleared before a new value can be or-ed in. Signed-off-by: Thomas Breitung <thomas.breitung@izt-labs.de> Signed-off-by: Wolfgang Ocker <weo@reccoware.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>