memory: pl172: add ARM PrimeCell PL175 MPMC support
The change adds support of ARM PrimeCell PL175 MPMC, the controller is
found on NXP LPC32xx SoC.
PL175 MPMC is very similar to PL172 controller, so it is preferred to
add its support into the existing driver.
One of the differences between PL172 and PL175 is that the latter one
supports up to 6 AHB ports, but still only 4 AHB ports can be assigned
to a static memory device, also PL175 does not have write buffer
enable control in static memory configuration register.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
diff --git a/drivers/memory/pl172.c b/drivers/memory/pl172.c
index 95a4ad7..cb6ebb8 100644
--- a/drivers/memory/pl172.c
+++ b/drivers/memory/pl172.c
@@ -118,7 +118,8 @@
if (of_property_read_bool(np, "mpmc,extended-wait"))
cfg |= MPMC_STATIC_CFG_EW;
- if (of_property_read_bool(np, "mpmc,buffer-enable"))
+ if (amba_part(adev) == 0x172 &&
+ of_property_read_bool(np, "mpmc,buffer-enable"))
cfg |= MPMC_STATIC_CFG_B;
if (of_property_read_bool(np, "mpmc,write-protect"))
@@ -190,6 +191,7 @@
}
static const char * const pl172_revisions[] = {"r1", "r2", "r2p3", "r2p4"};
+static const char * const pl175_revisions[] = {"r1"};
static int pl172_probe(struct amba_device *adev, const struct amba_id *id)
{
@@ -202,6 +204,9 @@
if (amba_part(adev) == 0x172) {
if (amba_rev(adev) < ARRAY_SIZE(pl172_revisions))
rev = pl172_revisions[amba_rev(adev)];
+ } else if (amba_part(adev) == 0x175) {
+ if (amba_rev(adev) < ARRAY_SIZE(pl175_revisions))
+ rev = pl175_revisions[amba_rev(adev)];
}
dev_info(dev, "ARM PL%x revision %s\n", amba_part(adev), rev);
@@ -283,6 +288,11 @@
.id = 0x07041172,
.mask = 0x3f0fffff,
},
+ /* PrimeCell MPMC PL175, EMC found on NXP LPC32xx */
+ {
+ .id = 0x07041175,
+ .mask = 0x3f0fffff,
+ },
{ 0, 0 },
};
MODULE_DEVICE_TABLE(amba, pl172_ids);