sh_eth: get R8A7740 Rx descriptor word 0 shift out of #ifdef
The only R8A7740 specific #ifdef hindering ARM multiplatform build is left in
sh_eth_rx(): it covers the code shifting Rx buffer descriptor word 0 by 16. Get
rid of the #ifdef by adding 'shift_rd0' field to the 'struct sh_eth_cpu_data',
making the shift dependent on it, and setting it to 1 for the R8A7740 case...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index 4b4c586..7732f11 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -656,6 +656,7 @@
.no_ade = 1,
.tsu = 1,
.select_mii = 1,
+ .shift_rd0 = 1,
};
static struct sh_eth_cpu_data sh7619_data = {
@@ -1259,7 +1260,6 @@
if (!(desc_status & RDFEND))
ndev->stats.rx_length_errors++;
-#if defined(CONFIG_ARCH_R8A7740)
/*
* In case of almost all GETHER/ETHERs, the Receive Frame State
* (RFS) bits in the Receive Descriptor 0 are from bit 9 to
@@ -1267,8 +1267,8 @@
* bits are from bit 25 to bit 16. So, the driver needs right
* shifting by 16.
*/
- desc_status >>= 16;
-#endif
+ if (mdp->cd->shift_rd0)
+ desc_status >>= 16;
if (desc_status & (RD_RFS1 | RD_RFS2 | RD_RFS3 | RD_RFS4 |
RD_RFS5 | RD_RFS6 | RD_RFS10)) {
diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
index 7540dc3..a78fb0c 100644
--- a/drivers/net/ethernet/renesas/sh_eth.h
+++ b/drivers/net/ethernet/renesas/sh_eth.h
@@ -481,6 +481,7 @@
unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */
unsigned hw_crc:1; /* E-DMAC have CSMR */
unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */
+ unsigned shift_rd0:1; /* shift Rx descriptor word 0 right by 16 */
};
struct sh_eth_private {