| commit | 3ae84d9269592a1284892c93597a604a894f1102 | [log] [tgz] |
|---|---|---|
| author | Jesse Brandeburg <jesse.brandeburg@intel.com> | Wed Aug 16 13:47:25 2006 -0700 |
| committer | Auke Kok <juke-jan.h.kok@intel.com> | Wed Aug 16 13:47:25 2006 -0700 |
| tree | e6bb8f5adf7b944ff21b25b0a4586529efceeefb | |
| parent | 0fe198a5e10229b269624a18bbd390001a8d3476 [diff] |
ixgb: fix cache miss due to miscalculation Reduce writeback threshold by 1. We were instructing the hardware to wait until the 17th descriptor which went over the cache line limit. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Auke Kok <auke.jan.h.kok@intel.com>