#
# ARM CPU Frequency scaling drivers
#

config ARM_OMAP2PLUS_CPUFREQ
	bool "TI OMAP2+"
	depends on ARCH_OMAP2PLUS
	default ARCH_OMAP2PLUS
	select CPU_FREQ_TABLE

config ARM_S3C2416_CPUFREQ
	bool "S3C2416 CPU Frequency scaling support"
	depends on CPU_S3C2416
	help
	  This adds the CPUFreq driver for the Samsung S3C2416 and
	  S3C2450 SoC. The S3C2416 supports changing the rate of the
	  armdiv clock source and also entering a so called dynamic
	  voltage scaling mode in which it is possible to reduce the
	  core voltage of the cpu.

	  If in doubt, say N.

config ARM_S3C2416_CPUFREQ_VCORESCALE
	bool "Allow voltage scaling for S3C2416 arm core"
	depends on ARM_S3C2416_CPUFREQ && REGULATOR
	help
	  Enable CPU voltage scaling when entering the dvs mode.
	  It uses information gathered through existing hardware and
	  tests but not documented in any datasheet.

	  If in doubt, say N.

config ARM_S3C64XX_CPUFREQ
	bool "Samsung S3C64XX"
	depends on CPU_S3C6410
	default y
	help
	  This adds the CPUFreq driver for Samsung S3C6410 SoC.

	  If in doubt, say N.

config ARM_S5PV210_CPUFREQ
	bool "Samsung S5PV210 and S5PC110"
	depends on CPU_S5PV210
	default y
	help
	  This adds the CPUFreq driver for Samsung S5PV210 and
	  S5PC110 SoCs.

	  If in doubt, say N.

config ARM_EXYNOS_CPUFREQ
	bool "SAMSUNG EXYNOS SoCs"
	depends on ARCH_EXYNOS
	default y
	help
	  This adds the CPUFreq driver common part for Samsung
	  EXYNOS SoCs.

	  If in doubt, say N.

config ARM_EXYNOS4210_CPUFREQ
	def_bool CPU_EXYNOS4210
	help
	  This adds the CPUFreq driver for Samsung EXYNOS4210
	  SoC (S5PV310 or S5PC210).

config ARM_EXYNOS4X12_CPUFREQ
	def_bool (SOC_EXYNOS4212 || SOC_EXYNOS4412)
	help
	  This adds the CPUFreq driver for Samsung EXYNOS4X12
	  SoC (EXYNOS4212 or EXYNOS4412).

config ARM_EXYNOS5250_CPUFREQ
	def_bool SOC_EXYNOS5250
	help
	  This adds the CPUFreq driver for Samsung EXYNOS5250
	  SoC.

config ARM_SPEAR_CPUFREQ
	bool "SPEAr CPUFreq support"
	depends on PLAT_SPEAR
	default y
	help
	  This adds the CPUFreq driver support for SPEAr SOCs.