tree 6ac134721cc41bbedb8679536b8020b68ebc61b8
parent dd93587be8dc8acf23a0d8a23efc74a91d8f0dfe
author Peter De Schrijver <pdeschrijver@nvidia.com> 1365000038 +0300
committer Stephen Warren <swarren@nvidia.com> 1365113442 -0600

clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE

Tegra114 PLLC2 and PLLC3 don't have a lock enable bit. The lock bits are
always functional.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>