tree aed8e0f577c63961a4b8c7ffef50e9b6c004e3f7
parent 15eb169bfec291faf25b158cfa9842b72f7803ad
author Will Deacon <will.deacon@arm.com> 1294852245 +0000
committer Will Deacon <will.deacon@arm.com> 1310062852 +0100

ARM: proc: add proc info for Cortex-A15MP using classic page tables

Multicore implementations of the Cortex-A15 require bit 6 of the
auxiliary control register to be set in order for cache and TLB
maintenance operations to be broadcast between CPUs.

This patch adds a new proc_info structure for Cortex-A15, which enables
the SMP bit during setup and includes the new HWCAP for integer
division.

Signed-off-by: Will Deacon <will.deacon@arm.com>