tree acec177001f40c9cc21454e0b140454026f5fd60
parent 0508901ca794d411efb09befb88b8194d8387428
author Mattias Nilsson <mattias.i.nilsson@stericsson.com> 1326468028 +0100
committer Samuel Ortiz <sameo@linux.intel.com> 1331055992 +0100

mfd: db8500 clock handling update

This updates the clock handling in the DB8500 PRCMU driver with
the latest findings and API changes related to changes in the
backing firmware in the PRCMU.

- Add the necessary interfaces to get the frequencies of the
  clocks and set the rate of some of the clocks.
- Add support for controlling the clocks PLLSOC0, PLLDSI,
  DSI0, DSI1 and DSI escape clocks (DSInESCCLK).
- Correct the PLLSDI enable/disable sequence by using the
  DSIPLL_CLAMPI bit.

After this we will have the interfaces and code to implement the
U8500 clock framework properly.

Reviewed-by: Jonas Aberg <jonas.aberg@stericsson.com>
Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>