Merge branch 'omap-for-v4.13/clkctrl' into omap-for-v4.13/soc-v4
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index c89757a..779fb1f 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -69,7 +69,6 @@
# OPP table initialization
ifeq ($(CONFIG_PM_OPP),y)
-obj-y += opp.o
obj-$(CONFIG_ARCH_OMAP3) += opp3xxx_data.o
obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o
endif
@@ -220,9 +219,6 @@
obj-$(CONFIG_SOC_OMAP5) += omap_hwmod_54xx_data.o
obj-$(CONFIG_SOC_DRA7XX) += omap_hwmod_7xx_data.o
-# EMU peripherals
-obj-$(CONFIG_HW_PERF_EVENTS) += pmu.o
-
# OMAP2420 MSDI controller integration support ("MMC")
obj-$(CONFIG_SOC_OMAP2420) += msdi.o
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 91272db..20f2553 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -53,14 +53,12 @@ static u32 board_caps;
static void board_check_revision(void)
{
- if (of_have_populated_dt()) {
- if (of_machine_is_compatible("nokia,n800"))
- board_caps = NOKIA_N800;
- else if (of_machine_is_compatible("nokia,n810"))
- board_caps = NOKIA_N810;
- else if (of_machine_is_compatible("nokia,n810-wimax"))
- board_caps = NOKIA_N810_WIMAX;
- }
+ if (of_machine_is_compatible("nokia,n800"))
+ board_caps = NOKIA_N800;
+ else if (of_machine_is_compatible("nokia,n810"))
+ board_caps = NOKIA_N810;
+ else if (of_machine_is_compatible("nokia,n810-wimax"))
+ board_caps = NOKIA_N810_WIMAX;
if (!board_caps)
pr_err("Unknown board\n");
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 4739512..93057fb 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -36,130 +36,6 @@
#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3
-static int __init omap3_l3_init(void)
-{
- struct omap_hwmod *oh;
- struct platform_device *pdev;
- char oh_name[L3_MODULES_MAX_LEN];
-
- /*
- * To avoid code running on other OMAPs in
- * multi-omap builds
- */
- if (!(cpu_is_omap34xx()) || of_have_populated_dt())
- return -ENODEV;
-
- snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
-
- oh = omap_hwmod_lookup(oh_name);
-
- if (!oh)
- pr_err("could not look up %s\n", oh_name);
-
- pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0);
-
- WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
-
- return PTR_ERR_OR_ZERO(pdev);
-}
-omap_postcore_initcall(omap3_l3_init);
-
-static inline void omap_init_sti(void) {}
-
-#if IS_ENABLED(CONFIG_SPI_OMAP24XX)
-
-#include <linux/platform_data/spi-omap2-mcspi.h>
-
-static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused)
-{
- struct platform_device *pdev;
- char *name = "omap2_mcspi";
- struct omap2_mcspi_platform_config *pdata;
- static int spi_num;
- struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
-
- pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
- if (!pdata) {
- pr_err("Memory allocation for McSPI device failed\n");
- return -ENOMEM;
- }
-
- pdata->num_cs = mcspi_attrib->num_chipselect;
- switch (oh->class->rev) {
- case OMAP2_MCSPI_REV:
- case OMAP3_MCSPI_REV:
- pdata->regs_offset = 0;
- break;
- case OMAP4_MCSPI_REV:
- pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
- break;
- default:
- pr_err("Invalid McSPI Revision value\n");
- kfree(pdata);
- return -EINVAL;
- }
-
- spi_num++;
- pdev = omap_device_build(name, spi_num, oh, pdata, sizeof(*pdata));
- WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
- name, oh->name);
- kfree(pdata);
- return 0;
-}
-
-static void omap_init_mcspi(void)
-{
- omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
-}
-
-#else
-static inline void omap_init_mcspi(void) {}
-#endif
-
-/**
- * omap_init_rng - bind the RNG hwmod to the RNG omap_device
- *
- * Bind the RNG hwmod to the RNG omap_device. No return value.
- */
-static void __init omap_init_rng(void)
-{
- struct omap_hwmod *oh;
- struct platform_device *pdev;
-
- oh = omap_hwmod_lookup("rng");
- if (!oh)
- return;
-
- pdev = omap_device_build("omap_rng", -1, oh, NULL, 0);
- WARN(IS_ERR(pdev), "Can't build omap_device for omap_rng\n");
-}
-
-static void __init omap_init_sham(void)
-{
- struct omap_hwmod *oh;
- struct platform_device *pdev;
-
- oh = omap_hwmod_lookup("sham");
- if (!oh)
- return;
-
- pdev = omap_device_build("omap-sham", -1, oh, NULL, 0);
- WARN(IS_ERR(pdev), "Can't build omap_device for omap-sham\n");
-}
-
-static void __init omap_init_aes(void)
-{
- struct omap_hwmod *oh;
- struct platform_device *pdev;
-
- oh = omap_hwmod_lookup("aes");
- if (!oh)
- return;
-
- pdev = omap_device_build("omap-aes", -1, oh, NULL, 0);
- WARN(IS_ERR(pdev), "Can't build omap_device for omap-aes\n");
-}
-
/*-------------------------------------------------------------------------*/
#if IS_ENABLED(CONFIG_VIDEO_OMAP2_VOUT)
@@ -185,54 +61,3 @@ int __init omap_init_vout(void)
#else
int __init omap_init_vout(void) { return 0; }
#endif
-
-/*-------------------------------------------------------------------------*/
-
-static int __init omap2_init_devices(void)
-{
- /* Enable dummy states for those platforms without pinctrl support */
- if (!of_have_populated_dt())
- pinctrl_provide_dummies();
-
- /* If dtb is there, the devices will be created dynamically */
- if (!of_have_populated_dt()) {
- /*
- * please keep these calls, and their implementations above,
- * in alphabetical order so they're easier to sort through.
- */
- omap_init_mcspi();
- omap_init_sham();
- omap_init_aes();
- omap_init_rng();
- }
- omap_init_sti();
-
- return 0;
-}
-omap_arch_initcall(omap2_init_devices);
-
-static int __init omap_gpmc_init(void)
-{
- struct omap_hwmod *oh;
- struct platform_device *pdev;
- char *oh_name = "gpmc";
-
- /*
- * if the board boots up with a populated DT, do not
- * manually add the device from this initcall
- */
- if (of_have_populated_dt())
- return -ENODEV;
-
- oh = omap_hwmod_lookup(oh_name);
- if (!oh) {
- pr_err("Could not look up %s\n", oh_name);
- return -ENODEV;
- }
-
- pdev = omap_device_build("omap-gpmc", -1, oh, NULL, 0);
- WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
-
- return PTR_ERR_OR_ZERO(pdev);
-}
-omap_postcore_initcall(omap_gpmc_init);
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index cb754c4..be517b0 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -153,7 +153,6 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
hc_name = kzalloc(sizeof(char) * (HSMMC_NAME_LEN + 1), GFP_KERNEL);
if (!hc_name) {
- pr_err("Cannot allocate memory for controller slot name\n");
kfree(hc_name);
return -ENOMEM;
}
@@ -315,10 +314,8 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
int res;
mmc_data = kzalloc(sizeof(*mmc_data), GFP_KERNEL);
- if (!mmc_data) {
- pr_err("Cannot allocate memory for mmc device!\n");
+ if (!mmc_data)
return;
- }
res = omap_hsmmc_pdata_init(hsmmcinfo, mmc_data);
if (res < 0)
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 5aafb84..1d739d1 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -493,67 +493,39 @@ void __init omap3_init_early(void)
omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
- /* XXX: remove these once OMAP3 is DT only */
- if (!of_have_populated_dt()) {
- omap2_set_globals_control(
- OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE));
- omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
- omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
- NULL);
- }
omap2_control_base_init();
omap3xxx_check_revision();
omap3xxx_check_features();
omap2_prcm_base_init();
- /* XXX: remove these once OMAP3 is DT only */
- if (!of_have_populated_dt()) {
- omap3xxx_prm_init(NULL);
- omap3xxx_cm_init(NULL);
- }
omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init();
omap3xxx_clockdomains_init();
omap3xxx_hwmod_init();
omap_hwmod_init_postsetup();
- if (!of_have_populated_dt()) {
- omap3_control_legacy_iomap_init();
- if (soc_is_am35xx())
- omap_clk_soc_init = am35xx_clk_legacy_init;
- else if (cpu_is_omap3630())
- omap_clk_soc_init = omap36xx_clk_legacy_init;
- else if (omap_rev() == OMAP3430_REV_ES1_0)
- omap_clk_soc_init = omap3430es1_clk_legacy_init;
- else
- omap_clk_soc_init = omap3430_clk_legacy_init;
- }
}
void __init omap3430_init_early(void)
{
omap3_init_early();
- if (of_have_populated_dt())
- omap_clk_soc_init = omap3430_dt_clk_init;
+ omap_clk_soc_init = omap3430_dt_clk_init;
}
void __init omap35xx_init_early(void)
{
omap3_init_early();
- if (of_have_populated_dt())
- omap_clk_soc_init = omap3430_dt_clk_init;
+ omap_clk_soc_init = omap3430_dt_clk_init;
}
void __init omap3630_init_early(void)
{
omap3_init_early();
- if (of_have_populated_dt())
- omap_clk_soc_init = omap3630_dt_clk_init;
+ omap_clk_soc_init = omap3630_dt_clk_init;
}
void __init am35xx_init_early(void)
{
omap3_init_early();
- if (of_have_populated_dt())
- omap_clk_soc_init = am35xx_dt_clk_init;
+ omap_clk_soc_init = am35xx_dt_clk_init;
}
void __init omap3_init_late(void)
@@ -628,8 +600,7 @@ void __init ti816x_init_early(void)
ti816x_clockdomains_init();
dm816x_hwmod_init();
omap_hwmod_init_postsetup();
- if (of_have_populated_dt())
- omap_clk_soc_init = dm816x_dt_clk_init;
+ omap_clk_soc_init = dm816x_dt_clk_init;
}
#endif
@@ -785,21 +756,19 @@ int __init omap_clk_init(void)
omap2_clk_setup_ll_ops();
- if (of_have_populated_dt()) {
- ret = omap_control_init();
- if (ret)
- return ret;
+ ret = omap_control_init();
+ if (ret)
+ return ret;
- ret = omap_prcm_init();
- if (ret)
- return ret;
+ ret = omap_prcm_init();
+ if (ret)
+ return ret;
- of_clk_init(NULL);
+ of_clk_init(NULL);
- ti_dt_clk_init_retry_clks();
+ ti_dt_clk_init_retry_clks();
- ti_dt_clockdomains_setup();
- }
+ ti_dt_clockdomains_setup();
ret = omap_clk_soc_init();
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index fc04be7..4acc0da 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -53,73 +53,3 @@ void __init omap3_mcbsp_init_pdata_callback(
pdata->force_ick_on = omap3_mcbsp_force_ick_on;
}
-
-static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
-{
- int id, count = 1;
- char *name = "omap-mcbsp";
- struct omap_hwmod *oh_device[2];
- struct omap_mcbsp_platform_data *pdata = NULL;
- struct platform_device *pdev;
-
- sscanf(oh->name, "mcbsp%d", &id);
-
- pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL);
- if (!pdata) {
- pr_err("%s: No memory for mcbsp\n", __func__);
- return -ENOMEM;
- }
-
- pdata->reg_step = 4;
- if (oh->class->rev < MCBSP_CONFIG_TYPE2) {
- pdata->reg_size = 2;
- } else {
- pdata->reg_size = 4;
- pdata->has_ccr = true;
- }
-
- if (oh->class->rev == MCBSP_CONFIG_TYPE2) {
- /* The FIFO has 128 locations */
- pdata->buffer_size = 0x80;
- } else if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
- if (id == 2)
- /* The FIFO has 1024 + 256 locations */
- pdata->buffer_size = 0x500;
- else
- /* The FIFO has 128 locations */
- pdata->buffer_size = 0x80;
- } else if (oh->class->rev == MCBSP_CONFIG_TYPE4) {
- /* The FIFO has 128 locations for all instances */
- pdata->buffer_size = 0x80;
- }
-
- if (oh->class->rev >= MCBSP_CONFIG_TYPE3)
- pdata->has_wakeup = true;
-
- oh_device[0] = oh;
-
- if (oh->dev_attr) {
- oh_device[1] = omap_hwmod_lookup((
- (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
- pdata->force_ick_on = omap3_mcbsp_force_ick_on;
- count++;
- }
- pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
- sizeof(*pdata));
- kfree(pdata);
- if (IS_ERR(pdev)) {
- pr_err("%s: Can't build omap_device for %s:%s.\n", __func__,
- name, oh->name);
- return PTR_ERR(pdev);
- }
- return 0;
-}
-
-static int __init omap2_mcbsp_init(void)
-{
- if (!of_have_populated_dt())
- omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
-
- return 0;
-}
-omap_arch_initcall(omap2_mcbsp_init);
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 369f95a..33ed5d5 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -58,6 +58,17 @@ static unsigned int irq_banks = DEFAULT_NR_REG_BANKS;
static unsigned int max_irqs = DEFAULT_IRQS;
static unsigned int omap_secure_apis;
+#ifdef CONFIG_CPU_PM
+static unsigned int wakeupgen_context[MAX_NR_REG_BANKS];
+#endif
+
+struct omap_wakeupgen_ops {
+ void (*save_context)(void);
+ void (*restore_context)(void);
+};
+
+static struct omap_wakeupgen_ops *wakeupgen_ops;
+
/*
* Static helper functions.
*/
@@ -264,6 +275,16 @@ static inline void omap5_irq_save_context(void)
}
+static inline void am43xx_irq_save_context(void)
+{
+ u32 i;
+
+ for (i = 0; i < irq_banks; i++) {
+ wakeupgen_context[i] = wakeupgen_readl(i, 0);
+ wakeupgen_writel(0, i, CPU0_ID);
+ }
+}
+
/*
* Save WakeupGen interrupt context in SAR BANK3. Restore is done by
* ROM code. WakeupGen IP is integrated along with GIC to manage the
@@ -280,11 +301,8 @@ static void irq_save_context(void)
if (!sar_base)
sar_base = omap4_get_sar_ram_base();
-
- if (soc_is_omap54xx())
- omap5_irq_save_context();
- else
- omap4_irq_save_context();
+ if (wakeupgen_ops && wakeupgen_ops->save_context)
+ wakeupgen_ops->save_context();
}
/*
@@ -306,6 +324,20 @@ static void irq_sar_clear(void)
writel_relaxed(val, sar_base + offset);
}
+static void am43xx_irq_restore_context(void)
+{
+ u32 i;
+
+ for (i = 0; i < irq_banks; i++)
+ wakeupgen_writel(wakeupgen_context[i], i, CPU0_ID);
+}
+
+static void irq_restore_context(void)
+{
+ if (wakeupgen_ops && wakeupgen_ops->restore_context)
+ wakeupgen_ops->restore_context();
+}
+
/*
* Save GIC and Wakeupgen interrupt context using secure API
* for HS/EMU devices.
@@ -319,6 +351,26 @@ static void irq_save_secure_context(void)
if (ret != API_HAL_RET_VALUE_OK)
pr_err("GIC and Wakeupgen context save failed\n");
}
+
+/* Define ops for context save and restore for each SoC */
+static struct omap_wakeupgen_ops omap4_wakeupgen_ops = {
+ .save_context = omap4_irq_save_context,
+ .restore_context = irq_sar_clear,
+};
+
+static struct omap_wakeupgen_ops omap5_wakeupgen_ops = {
+ .save_context = omap5_irq_save_context,
+ .restore_context = irq_sar_clear,
+};
+
+static struct omap_wakeupgen_ops am43xx_wakeupgen_ops = {
+ .save_context = am43xx_irq_save_context,
+ .restore_context = am43xx_irq_restore_context,
+};
+#else
+static struct omap_wakeupgen_ops omap4_wakeupgen_ops = {};
+static struct omap_wakeupgen_ops omap5_wakeupgen_ops = {};
+static struct omap_wakeupgen_ops am43xx_wakeupgen_ops = {};
#endif
#ifdef CONFIG_HOTPLUG_CPU
@@ -359,7 +411,7 @@ static int irq_notifier(struct notifier_block *self, unsigned long cmd, void *v)
break;
case CPU_CLUSTER_PM_EXIT:
if (omap_type() == OMAP2_DEVICE_TYPE_GP)
- irq_sar_clear();
+ irq_restore_context();
break;
}
return NOTIFY_OK;
@@ -494,9 +546,13 @@ static int __init wakeupgen_init(struct device_node *node,
irq_banks = OMAP4_NR_BANKS;
max_irqs = OMAP4_NR_IRQS;
omap_secure_apis = 1;
+ wakeupgen_ops = &omap4_wakeupgen_ops;
+ } else if (soc_is_omap54xx()) {
+ wakeupgen_ops = &omap5_wakeupgen_ops;
} else if (soc_is_am43xx()) {
irq_banks = AM43XX_NR_REG_BANKS;
max_irqs = AM43XX_IRQS;
+ wakeupgen_ops = &am43xx_wakeupgen_ops;
}
domain = irq_domain_add_hierarchy(parent_domain, 0, max_irqs,
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index f989145..ef9ffb8 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -65,7 +65,7 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias,
r = clk_get_sys(NULL, clk_name);
- if (IS_ERR(r) && of_have_populated_dt()) {
+ if (IS_ERR(r)) {
struct of_phandle_args clkspec;
clkspec.np = of_find_node_by_name(NULL, clk_name);
@@ -953,9 +953,6 @@ static int __init omap_device_late_init(void)
{
bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle);
- WARN(!of_have_populated_dt(),
- "legacy booting deprecated, please update to boot with .dts\n");
-
return 0;
}
omap_late_initcall_sync(omap_device_late_init);
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index e110767..3b47ded 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2446,24 +2446,21 @@ static int __init _init(struct omap_hwmod *oh, void *data)
{
int r, index;
struct device_node *np = NULL;
+ struct device_node *bus;
if (oh->_state != _HWMOD_STATE_REGISTERED)
return 0;
- if (of_have_populated_dt()) {
- struct device_node *bus;
+ bus = of_find_node_by_name(NULL, "ocp");
+ if (!bus)
+ return -ENODEV;
- bus = of_find_node_by_name(NULL, "ocp");
- if (!bus)
- return -ENODEV;
-
- r = of_dev_hwmod_lookup(bus, oh, &index, &np);
- if (r)
- pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
- else if (np && index)
- pr_warn("omap_hwmod: %s using broken dt data from %s\n",
- oh->name, np->name);
- }
+ r = of_dev_hwmod_lookup(bus, oh, &index, &np);
+ if (r)
+ pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
+ else if (np && index)
+ pr_warn("omap_hwmod: %s using broken dt data from %s\n",
+ oh->name, np->name);
r = _init_mpu_rt_base(oh, NULL, index, np);
if (r < 0) {
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 1c6ca4d..c327643 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3204,8 +3204,7 @@ int __init omap3xxx_hwmod_init(void)
* If DT information is missing, enable them only for GP devices.
*/
- if (of_have_populated_dt())
- bus = of_find_node_by_name(NULL, "ocp");
+ bus = of_find_node_by_name(NULL, "ocp");
if (h_sham && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "sham")) {
r = omap_hwmod_register_links(h_sham);
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c
deleted file mode 100644
index a358a07..0000000
--- a/arch/arm/mach-omap2/opp.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * OMAP SoC specific OPP wrapper function
- *
- * Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/
- * Nishanth Menon
- * Kevin Hilman
- * Copyright (C) 2010 Nokia Corporation.
- * Eduardo Valentin
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/pm_opp.h>
-#include <linux/cpu.h>
-
-#include "omap_device.h"
-
-#include "omap_opp_data.h"
-
-/* Temp variable to allow multiple calls */
-static u8 __initdata omap_table_init;
-
-/**
- * omap_init_opp_table() - Initialize opp table as per the CPU type
- * @opp_def: opp default list for this silicon
- * @opp_def_size: number of opp entries for this silicon
- *
- * Register the initial OPP table with the OPP library based on the CPU
- * type. This is meant to be used only by SoC specific registration.
- */
-int __init omap_init_opp_table(struct omap_opp_def *opp_def,
- u32 opp_def_size)
-{
- int i, r;
-
- if (of_have_populated_dt())
- return -EINVAL;
-
- if (!opp_def || !opp_def_size) {
- pr_err("%s: invalid params!\n", __func__);
- return -EINVAL;
- }
-
- /*
- * Initialize only if not already initialized even if the previous
- * call failed, because, no reason we'd succeed again.
- */
- if (omap_table_init)
- return -EEXIST;
- omap_table_init = 1;
-
- /* Lets now register with OPP library */
- for (i = 0; i < opp_def_size; i++, opp_def++) {
- struct omap_hwmod *oh;
- struct device *dev;
-
- if (!opp_def->hwmod_name) {
- pr_err("%s: NULL name of omap_hwmod, failing [%d].\n",
- __func__, i);
- return -EINVAL;
- }
-
- if (!strncmp(opp_def->hwmod_name, "mpu", 3)) {
- /*
- * All current OMAPs share voltage rail and
- * clock source, so CPU0 is used to represent
- * the MPU-SS.
- */
- dev = get_cpu_device(0);
- } else {
- oh = omap_hwmod_lookup(opp_def->hwmod_name);
- if (!oh || !oh->od) {
- pr_debug("%s: no hwmod or odev for %s, [%d] cannot add OPPs.\n",
- __func__, opp_def->hwmod_name, i);
- continue;
- }
- dev = &oh->od->pdev->dev;
- }
-
- r = dev_pm_opp_add(dev, opp_def->freq, opp_def->u_volt);
- if (r) {
- dev_err(dev, "%s: add OPP %ld failed for %s [%d] result=%d\n",
- __func__, opp_def->freq,
- opp_def->hwmod_name, i, r);
- } else {
- if (!opp_def->default_available)
- r = dev_pm_opp_disable(dev, opp_def->freq);
- if (r)
- dev_err(dev, "%s: disable %ld failed for %s [%d] result=%d\n",
- __func__, opp_def->freq,
- opp_def->hwmod_name, i, r);
- }
- }
-
- return 0;
-}
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
index fc67add..c2d459f 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -83,89 +83,3 @@ struct omap_volt_data omap36xx_vddcore_volt_data[] = {
VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16),
VOLT_DATA_DEFINE(0, 0, 0, 0),
};
-
-/* OPP data */
-
-static struct omap_opp_def __initdata omap34xx_opp_def_list[] = {
- /* MPU OPP1 */
- OPP_INITIALIZER("mpu", true, 125000000, OMAP3430_VDD_MPU_OPP1_UV),
- /* MPU OPP2 */
- OPP_INITIALIZER("mpu", true, 250000000, OMAP3430_VDD_MPU_OPP2_UV),
- /* MPU OPP3 */
- OPP_INITIALIZER("mpu", true, 500000000, OMAP3430_VDD_MPU_OPP3_UV),
- /* MPU OPP4 */
- OPP_INITIALIZER("mpu", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV),
- /* MPU OPP5 */
- OPP_INITIALIZER("mpu", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV),
-
- /*
- * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
- * almost the same than the one at 83MHz thus providing very little
- * gain for the power point of view. In term of energy it will even
- * increase the consumption due to the very negative performance
- * impact that frequency will do to the MPU and the whole system in
- * general.
- */
- OPP_INITIALIZER("l3_main", false, 41500000, OMAP3430_VDD_CORE_OPP1_UV),
- /* L3 OPP2 */
- OPP_INITIALIZER("l3_main", true, 83000000, OMAP3430_VDD_CORE_OPP2_UV),
- /* L3 OPP3 */
- OPP_INITIALIZER("l3_main", true, 166000000, OMAP3430_VDD_CORE_OPP3_UV),
-
- /* DSP OPP1 */
- OPP_INITIALIZER("iva", true, 90000000, OMAP3430_VDD_MPU_OPP1_UV),
- /* DSP OPP2 */
- OPP_INITIALIZER("iva", true, 180000000, OMAP3430_VDD_MPU_OPP2_UV),
- /* DSP OPP3 */
- OPP_INITIALIZER("iva", true, 360000000, OMAP3430_VDD_MPU_OPP3_UV),
- /* DSP OPP4 */
- OPP_INITIALIZER("iva", true, 400000000, OMAP3430_VDD_MPU_OPP4_UV),
- /* DSP OPP5 */
- OPP_INITIALIZER("iva", true, 430000000, OMAP3430_VDD_MPU_OPP5_UV),
-};
-
-static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {
- /* MPU OPP1 - OPP50 */
- OPP_INITIALIZER("mpu", true, 300000000, OMAP3630_VDD_MPU_OPP50_UV),
- /* MPU OPP2 - OPP100 */
- OPP_INITIALIZER("mpu", true, 600000000, OMAP3630_VDD_MPU_OPP100_UV),
- /* MPU OPP3 - OPP-Turbo */
- OPP_INITIALIZER("mpu", false, 800000000, OMAP3630_VDD_MPU_OPP120_UV),
- /* MPU OPP4 - OPP-SB */
- OPP_INITIALIZER("mpu", false, 1000000000, OMAP3630_VDD_MPU_OPP1G_UV),
-
- /* L3 OPP1 - OPP50 */
- OPP_INITIALIZER("l3_main", true, 100000000, OMAP3630_VDD_CORE_OPP50_UV),
- /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
- OPP_INITIALIZER("l3_main", true, 200000000, OMAP3630_VDD_CORE_OPP100_UV),
-
- /* DSP OPP1 - OPP50 */
- OPP_INITIALIZER("iva", true, 260000000, OMAP3630_VDD_MPU_OPP50_UV),
- /* DSP OPP2 - OPP100 */
- OPP_INITIALIZER("iva", true, 520000000, OMAP3630_VDD_MPU_OPP100_UV),
- /* DSP OPP3 - OPP-Turbo */
- OPP_INITIALIZER("iva", false, 660000000, OMAP3630_VDD_MPU_OPP120_UV),
- /* DSP OPP4 - OPP-SB */
- OPP_INITIALIZER("iva", false, 800000000, OMAP3630_VDD_MPU_OPP1G_UV),
-};
-
-/**
- * omap3_opp_init() - initialize omap3 opp table
- */
-int __init omap3_opp_init(void)
-{
- int r = -ENODEV;
-
- if (!cpu_is_omap34xx())
- return r;
-
- if (cpu_is_omap3630())
- r = omap_init_opp_table(omap36xx_opp_def_list,
- ARRAY_SIZE(omap36xx_opp_def_list));
- else
- r = omap_init_opp_table(omap34xx_opp_def_list,
- ARRAY_SIZE(omap34xx_opp_def_list));
-
- return r;
-}
-omap_device_initcall(omap3_opp_init);
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
index 1ef7a3e..adea43e 100644
--- a/arch/arm/mach-omap2/opp4xxx_data.c
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -63,29 +63,6 @@ struct omap_volt_data omap443x_vdd_core_volt_data[] = {
VOLT_DATA_DEFINE(0, 0, 0, 0),
};
-
-static struct omap_opp_def __initdata omap443x_opp_def_list[] = {
- /* MPU OPP1 - OPP50 */
- OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV),
- /* MPU OPP2 - OPP100 */
- OPP_INITIALIZER("mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV),
- /* MPU OPP3 - OPP-Turbo */
- OPP_INITIALIZER("mpu", true, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV),
- /* MPU OPP4 - OPP-SB */
- OPP_INITIALIZER("mpu", true, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV),
- /* L3 OPP1 - OPP50 */
- OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV),
- /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
- OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4430_VDD_CORE_OPP100_UV),
- /* IVA OPP1 - OPP50 */
- OPP_INITIALIZER("iva", true, 133000000, OMAP4430_VDD_IVA_OPP50_UV),
- /* IVA OPP2 - OPP100 */
- OPP_INITIALIZER("iva", true, 266100000, OMAP4430_VDD_IVA_OPP100_UV),
- /* IVA OPP3 - OPP-Turbo */
- OPP_INITIALIZER("iva", false, 332000000, OMAP4430_VDD_IVA_OPPTURBO_UV),
- /* TODO: add DSP, aess, fdif, gpu */
-};
-
#define OMAP4460_VDD_MPU_OPP50_UV 1025000
#define OMAP4460_VDD_MPU_OPP100_UV 1200000
#define OMAP4460_VDD_MPU_OPPTURBO_UV 1313000
@@ -122,59 +99,3 @@ struct omap_volt_data omap446x_vdd_core_volt_data[] = {
VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_OV_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100OV, 0xf9, 0x16),
VOLT_DATA_DEFINE(0, 0, 0, 0),
};
-
-static struct omap_opp_def __initdata omap446x_opp_def_list[] = {
- /* MPU OPP1 - OPP50 */
- OPP_INITIALIZER("mpu", true, 350000000, OMAP4460_VDD_MPU_OPP50_UV),
- /* MPU OPP2 - OPP100 */
- OPP_INITIALIZER("mpu", true, 700000000, OMAP4460_VDD_MPU_OPP100_UV),
- /* MPU OPP3 - OPP-Turbo */
- OPP_INITIALIZER("mpu", true, 920000000, OMAP4460_VDD_MPU_OPPTURBO_UV),
- /*
- * MPU OPP4 - OPP-Nitro + Disabled as the reference schematics
- * recommends TPS623631 - confirm and enable the opp in board file
- * XXX: May be we should enable these based on mpu capability and
- * Exception board files disable it...
- */
- OPP_INITIALIZER("mpu", false, 1200000000, OMAP4460_VDD_MPU_OPPNITRO_UV),
- /* MPU OPP4 - OPP-Nitro SpeedBin */
- OPP_INITIALIZER("mpu", false, 1500000000, OMAP4460_VDD_MPU_OPPNITRO_UV),
- /* L3 OPP1 - OPP50 */
- OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4460_VDD_CORE_OPP50_UV),
- /* L3 OPP2 - OPP100 */
- OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4460_VDD_CORE_OPP100_UV),
- /* IVA OPP1 - OPP50 */
- OPP_INITIALIZER("iva", true, 133000000, OMAP4460_VDD_IVA_OPP50_UV),
- /* IVA OPP2 - OPP100 */
- OPP_INITIALIZER("iva", true, 266100000, OMAP4460_VDD_IVA_OPP100_UV),
- /*
- * IVA OPP3 - OPP-Turbo + Disabled as the reference schematics
- * recommends Phoenix VCORE2 which can supply only 600mA - so the ones
- * above this OPP frequency, even though OMAP is capable, should be
- * enabled by board file which is sure of the chip power capability
- */
- OPP_INITIALIZER("iva", false, 332000000, OMAP4460_VDD_IVA_OPPTURBO_UV),
- /* IVA OPP4 - OPP-Nitro */
- OPP_INITIALIZER("iva", false, 430000000, OMAP4460_VDD_IVA_OPPNITRO_UV),
- /* IVA OPP5 - OPP-Nitro SpeedBin*/
- OPP_INITIALIZER("iva", false, 500000000, OMAP4460_VDD_IVA_OPPNITRO_UV),
-
- /* TODO: add DSP, aess, fdif, gpu */
-};
-
-/**
- * omap4_opp_init() - initialize omap4 opp table
- */
-int __init omap4_opp_init(void)
-{
- int r = -ENODEV;
-
- if (cpu_is_omap443x())
- r = omap_init_opp_table(omap443x_opp_def_list,
- ARRAY_SIZE(omap443x_opp_def_list));
- else if (cpu_is_omap446x())
- r = omap_init_opp_table(omap446x_opp_def_list,
- ARRAY_SIZE(omap446x_opp_def_list));
- return r;
-}
-omap_device_initcall(omap4_opp_init);
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 63027e6..366158a 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -71,7 +71,7 @@ void omap_pm_get_oscillator(u32 *tstart, u32 *tshut)
}
#endif
-int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
+int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
{
clkdm_allow_idle(clkdm);
return 0;
diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c
deleted file mode 100644
index d2adfeb..0000000
--- a/arch/arm/mach-omap2/pmu.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * OMAP2 ARM Performance Monitoring Unit (PMU) Support
- *
- * Copyright (C) 2012 Texas Instruments, Inc.
- *
- * Contacts:
- * Jon Hunter <jon-hunter@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#include <linux/of.h>
-
-#include <asm/system_info.h>
-
-#include "soc.h"
-#include "omap_hwmod.h"
-#include "omap_device.h"
-
-static char *omap2_pmu_oh_names[] = {"mpu"};
-static char *omap3_pmu_oh_names[] = {"mpu", "debugss"};
-static char *omap4430_pmu_oh_names[] = {"l3_main_3", "l3_instr", "debugss"};
-static struct platform_device *omap_pmu_dev;
-
-/**
- * omap2_init_pmu - creates and registers PMU platform device
- * @oh_num: Number of OMAP HWMODs required to create PMU device
- * @oh_names: Array of OMAP HWMODS names required to create PMU device
- *
- * Uses OMAP HWMOD framework to create and register an ARM PMU device
- * from a list of HWMOD names passed. Currently supports OMAP2, OMAP3
- * and OMAP4 devices.
- */
-static int __init omap2_init_pmu(unsigned oh_num, char *oh_names[])
-{
- int i;
- struct omap_hwmod *oh[3];
- char *dev_name = cpu_architecture() == CPU_ARCH_ARMv6 ?
- "armv6-pmu" : "armv7-pmu";
-
- if ((!oh_num) || (oh_num > 3))
- return -EINVAL;
-
- for (i = 0; i < oh_num; i++) {
- oh[i] = omap_hwmod_lookup(oh_names[i]);
- if (!oh[i]) {
- pr_err("Could not look up %s hwmod\n", oh_names[i]);
- return -ENODEV;
- }
- }
-
- omap_pmu_dev = omap_device_build_ss(dev_name, -1, oh, oh_num, NULL, 0);
- WARN(IS_ERR(omap_pmu_dev), "Can't build omap_device for %s.\n",
- dev_name);
-
- return PTR_ERR_OR_ZERO(omap_pmu_dev);
-}
-
-static int __init omap_init_pmu(void)
-{
- unsigned oh_num;
- char **oh_names;
-
- /* XXX Remove this check when the CTI driver is available */
- if (cpu_is_omap443x()) {
- pr_info("ARM PMU: not yet supported on OMAP4430 due to missing CTI driver\n");
- return 0;
- }
-
- if (of_have_populated_dt())
- return 0;
-
- /*
- * To create an ARM-PMU device the following HWMODs
- * are required for the various OMAP2+ devices.
- *
- * OMAP24xx: mpu
- * OMAP3xxx: mpu, debugss
- * OMAP4430: l3_main_3, l3_instr, debugss
- * OMAP4460/70: mpu, debugss
- */
- if (cpu_is_omap443x()) {
- oh_num = ARRAY_SIZE(omap4430_pmu_oh_names);
- oh_names = omap4430_pmu_oh_names;
- } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- oh_num = ARRAY_SIZE(omap3_pmu_oh_names);
- oh_names = omap3_pmu_oh_names;
- } else {
- oh_num = ARRAY_SIZE(omap2_pmu_oh_names);
- oh_names = omap2_pmu_oh_names;
- }
-
- return omap2_init_pmu(oh_num, oh_names);
-}
-omap_subsys_initcall(omap_init_pmu);
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 50291a0..382e236 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -690,6 +690,8 @@ static const struct of_device_id omap3_prm_dt_match_table[] = {
static int omap3xxx_prm_late_init(void)
{
+ struct device_node *np;
+ int irq_num;
int ret;
if (!(prm_features & PRM_HAS_IO_WAKEUP))
@@ -702,16 +704,11 @@ static int omap3xxx_prm_late_init(void)
omap3_prcm_irq_setup.reconfigure_io_chain =
omap3430_pre_es3_1_reconfigure_io_chain;
- if (of_have_populated_dt()) {
- struct device_node *np;
- int irq_num;
-
- np = of_find_matching_node(NULL, omap3_prm_dt_match_table);
- if (np) {
- irq_num = of_irq_get(np, 0);
- if (irq_num >= 0)
- omap3_prcm_irq_setup.irq = irq_num;
- }
+ np = of_find_matching_node(NULL, omap3_prm_dt_match_table);
+ if (np) {
+ irq_num = of_irq_get(np, 0);
+ if (irq_num >= 0)
+ omap3_prcm_irq_setup.irq = irq_num;
}
omap3xxx_prm_enable_io_wakeup();
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 090a131..87e86a4 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -337,27 +337,6 @@ static void omap44xx_prm_reconfigure_io_chain(void)
}
/**
- * omap44xx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches
- *
- * Activates the I/O wakeup event latches and allows events logged by
- * those latches to signal a wakeup event to the PRCM. For I/O wakeups
- * to occur, WAKEUPENABLE bits must be set in the pad mux registers, and
- * omap44xx_prm_reconfigure_io_chain() must be called. No return value.
- */
-static void __init omap44xx_prm_enable_io_wakeup(void)
-{
- s32 inst = omap4_prmst_get_prm_dev_inst();
-
- if (inst == PRM_INSTANCE_UNKNOWN)
- return;
-
- omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
- OMAP4430_GLOBAL_WUEN_MASK,
- inst,
- omap4_prcm_irq_setup.pm_ctrl);
-}
-
-/**
* omap44xx_prm_read_reset_sources - return the last SoC reset source
*
* Return a u32 representing the last reset sources of the SoC. The
@@ -689,8 +668,6 @@ struct pwrdm_ops omap4_pwrdm_operations = {
.pwrdm_has_voltdm = omap4_check_vcvp,
};
-static int omap44xx_prm_late_init(void);
-
/*
* XXX document
*/
@@ -698,7 +675,6 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
.read_reset_sources = &omap44xx_prm_read_reset_sources,
.was_any_context_lost_old = &omap44xx_prm_was_any_context_lost_old,
.clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old,
- .late_init = &omap44xx_prm_late_init,
.assert_hardreset = omap4_prminst_assert_hardreset,
.deassert_hardreset = omap4_prminst_deassert_hardreset,
.is_hardreset_asserted = omap4_prminst_is_hardreset_asserted,
@@ -735,41 +711,6 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data)
return prm_register(&omap44xx_prm_ll_data);
}
-static int omap44xx_prm_late_init(void)
-{
- int irq_num;
-
- if (!(prm_features & PRM_HAS_IO_WAKEUP))
- return 0;
-
- /* OMAP4+ is DT only now */
- if (!of_have_populated_dt())
- return 0;
-
- irq_num = of_irq_get(prm_init_data->np, 0);
- /*
- * Already have OMAP4 IRQ num. For all other platforms, we need
- * IRQ numbers from DT
- */
- if (irq_num < 0 && !(prm_init_data->flags & PRM_IRQ_DEFAULT)) {
- if (irq_num == -EPROBE_DEFER)
- return irq_num;
-
- /* Have nothing to do */
- return 0;
- }
-
- /* Once OMAP4 DT is filled as well */
- if (irq_num >= 0) {
- omap4_prcm_irq_setup.irq = irq_num;
- omap4_prcm_irq_setup.xlate_irq = NULL;
- }
-
- omap44xx_prm_enable_io_wakeup();
-
- return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
-}
-
static void __exit omap44xx_prm_exit(void)
{
prm_unregister(&omap44xx_prm_ll_data);
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index ae13aa7..d421311 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -267,10 +267,9 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
{
int nr_regs;
u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG];
- int offset, i;
+ int offset, i, irq;
struct irq_chip_generic *gc;
struct irq_chip_type *ct;
- unsigned int irq;
if (!irq_setup)
return -EINVAL;
@@ -344,10 +343,8 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
prcm_irq_chips[i] = gc;
}
- if (of_have_populated_dt()) {
- int irq = omap_prcm_event_to_irq("io");
- omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain);
- }
+ irq = omap_prcm_event_to_irq("io");
+ omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain);
return 0;
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index d7cff26..eef6935 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -44,13 +44,9 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
while (volt_data[count].volt_nominal)
count++;
- nvalue_table = kzalloc(sizeof(struct omap_sr_nvalue_table)*count,
- GFP_KERNEL);
-
- if (!nvalue_table) {
- pr_err("OMAP: SmartReflex: cannot allocate memory for n-value table\n");
+ nvalue_table = kcalloc(count, sizeof(*nvalue_table), GFP_KERNEL);
+ if (!nvalue_table)
return;
- }
for (i = 0, j = 0; i < count; i++) {
u32 v;
@@ -102,12 +98,9 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
char *name = "smartreflex";
static int i;
- sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
- if (!sr_data) {
- pr_err("%s: Unable to allocate memory for %s sr_data\n",
- __func__, oh->name);
+ sr_data = kzalloc(sizeof(*sr_data), GFP_KERNEL);
+ if (!sr_data)
return -ENOMEM;
- }
sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index af90f95..6a861c0 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -68,6 +68,9 @@
static struct omap_dm_timer clkev;
static struct clock_event_device clockevent_gpt;
+/* Clockevent hwmod for am335x and am437x suspend */
+static struct omap_hwmod *clockevent_gpt_hwmod;
+
#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
static unsigned long arch_timer_freq;
@@ -125,6 +128,23 @@ static int omap2_gp_timer_set_periodic(struct clock_event_device *evt)
return 0;
}
+static void omap_clkevt_idle(struct clock_event_device *unused)
+{
+ if (!clockevent_gpt_hwmod)
+ return;
+
+ omap_hwmod_idle(clockevent_gpt_hwmod);
+}
+
+static void omap_clkevt_unidle(struct clock_event_device *unused)
+{
+ if (!clockevent_gpt_hwmod)
+ return;
+
+ omap_hwmod_enable(clockevent_gpt_hwmod);
+ __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
+}
+
static struct clock_event_device clockevent_gpt = {
.features = CLOCK_EVT_FEAT_PERIODIC |
CLOCK_EVT_FEAT_ONESHOT,
@@ -232,39 +252,29 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
const char **timer_name,
int posted)
{
- char name[10]; /* 10 = sizeof("gptXX_Xck0") */
const char *oh_name = NULL;
struct device_node *np;
struct omap_hwmod *oh;
- struct resource irq, mem;
struct clk *src;
int r = 0;
- if (of_have_populated_dt()) {
- np = omap_get_timer_dt(omap_timer_match, property);
- if (!np)
- return -ENODEV;
+ np = omap_get_timer_dt(omap_timer_match, property);
+ if (!np)
+ return -ENODEV;
- of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
- if (!oh_name)
- return -ENODEV;
+ of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
+ if (!oh_name)
+ return -ENODEV;
- timer->irq = irq_of_parse_and_map(np, 0);
- if (!timer->irq)
- return -ENXIO;
+ timer->irq = irq_of_parse_and_map(np, 0);
+ if (!timer->irq)
+ return -ENXIO;
- timer->io_base = of_iomap(np, 0);
+ timer->io_base = of_iomap(np, 0);
- timer->fclk = of_clk_get_by_name(np, "fck");
+ timer->fclk = of_clk_get_by_name(np, "fck");
- of_node_put(np);
- } else {
- if (omap_dm_timer_reserve_systimer(timer->id))
- return -ENODEV;
-
- sprintf(name, "timer%d", timer->id);
- oh_name = name;
- }
+ of_node_put(np);
oh = omap_hwmod_lookup(oh_name);
if (!oh)
@@ -272,22 +282,6 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
*timer_name = oh->name;
- if (!of_have_populated_dt()) {
- r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL,
- &irq);
- if (r)
- return -ENXIO;
- timer->irq = irq.start;
-
- r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL,
- &mem);
- if (r)
- return -ENXIO;
-
- /* Static mapping, never released */
- timer->io_base = ioremap(mem.start, mem.end - mem.start);
- }
-
if (!timer->io_base)
return -ENXIO;
@@ -361,6 +355,14 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
3, /* Timer internal resynch latency */
0xffffffff);
+ if (soc_is_am33xx() || soc_is_am43xx()) {
+ clockevent_gpt.suspend = omap_clkevt_idle;
+ clockevent_gpt.resume = omap_clkevt_unidle;
+
+ clockevent_gpt_hwmod =
+ omap_hwmod_lookup(clockevent_gpt.name);
+ }
+
pr_info("OMAP clockevent source: %s at %lu Hz\n", clockevent_gpt.name,
clkev.rate);
}
@@ -408,18 +410,15 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
const char *oh_name = "counter_32k";
/*
- * If device-tree is present, then search the DT blob
- * to see if the 32kHz counter is supported.
+ * See if the 32kHz counter is supported.
*/
- if (of_have_populated_dt()) {
- np = omap_get_timer_dt(omap_counter_match, NULL);
- if (!np)
- return -ENODEV;
+ np = omap_get_timer_dt(omap_counter_match, NULL);
+ if (!np)
+ return -ENODEV;
- of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
- if (!oh_name)
- return -ENODEV;
- }
+ of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
+ if (!oh_name)
+ return -ENODEV;
/*
* First check hwmod data is available for sync32k counter
@@ -437,18 +436,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
return ret;
}
- if (!of_have_populated_dt()) {
- void __iomem *vbase;
-
- vbase = omap_hwmod_get_mpu_rt_va(oh);
-
- ret = omap_init_clocksource_32k(vbase);
- if (ret) {
- pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
- __func__, ret);
- omap_hwmod_idle(oh);
- }
- }
return ret;
}
@@ -664,96 +651,6 @@ void __init omap5_realtime_timer_init(void)
#endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */
/**
- * omap_timer_init - build and register timer device with an
- * associated timer hwmod
- * @oh: timer hwmod pointer to be used to build timer device
- * @user: parameter that can be passed from calling hwmod API
- *
- * Called by omap_hwmod_for_each_by_class to register each of the timer
- * devices present in the system. The number of timer devices is known
- * by parsing through the hwmod database for a given class name. At the
- * end of function call memory is allocated for timer device and it is
- * registered to the framework ready to be proved by the driver.
- */
-static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
-{
- int id;
- int ret = 0;
- char *name = "omap_timer";
- struct dmtimer_platform_data *pdata;
- struct platform_device *pdev;
- struct omap_timer_capability_dev_attr *timer_dev_attr;
-
- pr_debug("%s: %s\n", __func__, oh->name);
-
- /* on secure device, do not register secure timer */
- timer_dev_attr = oh->dev_attr;
- if (omap_type() != OMAP2_DEVICE_TYPE_GP && timer_dev_attr)
- if (timer_dev_attr->timer_capability == OMAP_TIMER_SECURE)
- return ret;
-
- pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
- if (!pdata) {
- pr_err("%s: No memory for [%s]\n", __func__, oh->name);
- return -ENOMEM;
- }
-
- /*
- * Extract the IDs from name field in hwmod database
- * and use the same for constructing ids' for the
- * timer devices. In a way, we are avoiding usage of
- * static variable witin the function to do the same.
- * CAUTION: We have to be careful and make sure the
- * name in hwmod database does not change in which case
- * we might either make corresponding change here or
- * switch back static variable mechanism.
- */
- sscanf(oh->name, "timer%2d", &id);
-
- if (timer_dev_attr)
- pdata->timer_capability = timer_dev_attr->timer_capability;
-
- pdata->timer_errata = omap_dm_timer_get_errata();
- pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
-
- pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata));
-
- if (IS_ERR(pdev)) {
- pr_err("%s: Can't build omap_device for %s: %s.\n",
- __func__, name, oh->name);
- ret = -EINVAL;
- }
-
- kfree(pdata);
-
- return ret;
-}
-
-/**
- * omap2_dm_timer_init - top level regular device initialization
- *
- * Uses dedicated hwmod api to parse through hwmod database for
- * given class name and then build and register the timer device.
- */
-static int __init omap2_dm_timer_init(void)
-{
- int ret;
-
- /* If dtb is there, the devices will be created dynamically */
- if (of_have_populated_dt())
- return -ENODEV;
-
- ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL);
- if (unlikely(ret)) {
- pr_err("%s: device registration failed.\n", __func__);
- return -EINVAL;
- }
-
- return 0;
-}
-omap_arch_initcall(omap2_dm_timer_init);
-
-/**
* omap2_override_clocksource - clocksource override with user configuration
*
* Allows user to override default clocksource, using kernel parameter
diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c
index ff0a68c..0084b6c 100644
--- a/arch/arm/mach-omap2/wd_timer.c
+++ b/arch/arm/mach-omap2/wd_timer.c
@@ -102,31 +102,3 @@ int omap2_wd_timer_reset(struct omap_hwmod *oh)
return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT :
omap2_wd_timer_disable(oh);
}
-
-static int __init omap_init_wdt(void)
-{
- int id = -1;
- struct platform_device *pdev;
- struct omap_hwmod *oh;
- char *oh_name = "wd_timer2";
- char *dev_name = "omap_wdt";
- struct omap_wd_timer_platform_data pdata;
-
- if (!cpu_class_is_omap2() || of_have_populated_dt())
- return 0;
-
- oh = omap_hwmod_lookup(oh_name);
- if (!oh) {
- pr_err("Could not look up wd_timer%d hwmod\n", id);
- return -EINVAL;
- }
-
- pdata.read_reset_sources = prm_read_reset_sources;
-
- pdev = omap_device_build(dev_name, id, oh, &pdata,
- sizeof(struct omap_wd_timer_platform_data));
- WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
- dev_name, oh->name);
- return 0;
-}
-omap_subsys_initcall(omap_init_wdt);