commit | 641e97f318870921d048154af6807e46e43c307a | [log] [tgz] |
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author | Ralf Baechle <ralf@linux-mips.org> | Thu Oct 11 23:46:05 2007 +0100 |
committer | Ralf Baechle <ralf@linux-mips.org> | Thu Oct 11 23:46:05 2007 +0100 |
tree | 6e0984a1bc8932db848be3fdb104a92c97fe341a | |
parent | 424b28ba4d25fc41abdb7e6fa90e132f0d9558fb [diff] |
[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code. It may not be perfect yet but the SB1 code is badly borken and has horrible performance issues. Downside: This seriously breaks support for pass 1 parts of the BCM1250 where indexed cacheops don't work quite reliable but I seem to be the last one on the planet with a pass 1 part anyway. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>