tree 4bcaff275abd3044c3b7a6264e7f147e6ce45fce
parent 68925176296a8b995e503349200e256674bfe5ac
author Marc Zyngier <marc.zyngier@arm.com> 1487676767 +0000
committer Marc Zyngier <marc.zyngier@arm.com> 1488796257 +0000

KVM: arm/arm64: vgic-v3: Don't pretend to support IRQ/FIQ bypass

Our GICv3 emulation always presents ICC_SRE_EL1 with DIB/DFB set to
zero, which implies that there is a way to bypass the GIC and
inject raw IRQ/FIQ by driving the CPU pins.

Of course, we don't allow that when the GIC is configured, but
we fail to indicate that to the guest. The obvious fix is to
set these bits (and never let them being changed again).

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Christoffer Dall <cdall@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>