tree 2ab0905104403822ec05c5f402e9e39cb720dd91
parent 59871902703c47acc730555be41bd9cb36d3700c
author Russell King <rmk+kernel@arm.linux.org.uk> 1383758322 +0000
committer Russell King <rmk+kernel@arm.linux.org.uk> 1396567821 +0100

dmaengine: omap-dma: use cached CCR value when enabling DMA

We don't need to read-modify-write the CCR register; we already know
what value it should contain at this point.  Use the cached CCR value
when setting the enable bit.

Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>