tree 5c330689c876b94c34857feefdac1b2cbb27cbc3
parent 1fd11777c2f0e6b6b37432b984bf40e3c6072f23
author Alex Deucher <alexander.deucher@amd.com> 1374586865 -0400
committer Alex Deucher <alexander.deucher@amd.com> 1377894608 -0400

drm/radeon: implement clock and power gating for CIK (v3)

Only the APUs support power gating.

v2: disable cgcg for now
v3: workaround hw issue in mgcg

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>