commit 10dd5ce28d78e2440e8fa1135d17e33399d75340
author Russell King <rmk@dyn-67.arm.linux.org.uk> Thu Nov 23 11:41:32 2006 +0000
committer Russell King <rmk+kernel@arm.linux.org.uk> Thu Nov 30 12:24:47 2006 +0000
tree d2e76765a57e7e47a9c424f99c3a22bf99c6da64
parent 127e477e0cd8da4d3058709ab2dc7b92dccbcba5

[ARM] Remove compatibility layer for ARM irqs

set_irq_chipdata -> set_irq_chip_data
get_irq_chipdata -> get_irq_chip_data
do_level_IRQ -> handle_level_irq
do_edge_IRQ -> handle_edge_irq
do_simple_IRQ -> handle_simple_irq
irqdesc -> irq_desc
irqchip -> irq_chip

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

arch/arm/mach-pxa/mainstone.c

diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 49c34d9..56d94d8 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -71,7 +71,7 @@
 	.unmask		= mainstone_unmask_irq,
 };
 
-static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc)
+static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
 	unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
 	do {
@@ -94,7 +94,7 @@
 	/* setup extra Mainstone irqs */
 	for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
 		set_irq_chip(irq, &mainstone_irq_chip);
-		set_irq_handler(irq, do_level_IRQ);
+		set_irq_handler(irq, handle_level_irq);
 		if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
 			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
 		else