tree 08224e4eb6d1b1471cc3322b626250e2d82bce7e
parent 0414855fdc4a40da05221fc6062cccbc0c30f169
author Markos Chandras <markos.chandras@imgtec.com> 1391102489 +0000
committer Ralf Baechle <ralf@linux-mips.org> 1394137521 +0100

MIPS: mm: c-r4k: Detect instruction cache aliases

The *Aptiv cores can use the CONF7/IAR bit to detect if the core
has hardware support to remove instruction cache aliasing.

This also defines the CONF7/AR bit in order to avoid using
the '16' magic number.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6499/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>