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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* irq-mb93093.c: MB93093 FPGA interrupt handling
2 *
David Howells1bcbba32006-09-25 23:32:04 -07003 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
Linus Torvalds1da177e2005-04-16 15:20:36 -070012#include <linux/ptrace.h>
13#include <linux/errno.h>
14#include <linux/signal.h>
15#include <linux/sched.h>
16#include <linux/ioport.h>
17#include <linux/interrupt.h>
18#include <linux/init.h>
19#include <linux/irq.h>
Jiri Slaby1977f032007-10-18 23:40:25 -070020#include <linux/bitops.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021
22#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#include <asm/delay.h>
24#include <asm/irq.h>
25#include <asm/irc-regs.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
27#define __reg16(ADDR) (*(volatile unsigned short *)(__region_CS2 + (ADDR)))
28
29#define __get_IMR() ({ __reg16(0x0a); })
30#define __set_IMR(M) do { __reg16(0x0a) = (M); wmb(); } while(0)
31#define __get_IFR() ({ __reg16(0x02); })
32#define __clr_IFR(M) do { __reg16(0x02) = ~(M); wmb(); } while(0)
33
Linus Torvalds1da177e2005-04-16 15:20:36 -070034/*
David Howells1bcbba32006-09-25 23:32:04 -070035 * off-CPU FPGA PIC operations
Linus Torvalds1da177e2005-04-16 15:20:36 -070036 */
Thomas Gleixner9741f282011-02-06 20:20:36 +010037static void frv_fpga_mask(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -070038{
David Howells1bcbba32006-09-25 23:32:04 -070039 uint16_t imr = __get_IMR();
Linus Torvalds1da177e2005-04-16 15:20:36 -070040
Thomas Gleixner9741f282011-02-06 20:20:36 +010041 imr |= 1 << (d->irq - IRQ_BASE_FPGA);
David Howells1bcbba32006-09-25 23:32:04 -070042 __set_IMR(imr);
Linus Torvalds1da177e2005-04-16 15:20:36 -070043}
44
Thomas Gleixner9741f282011-02-06 20:20:36 +010045static void frv_fpga_ack(struct irq_data *d)
David Howells1bcbba32006-09-25 23:32:04 -070046{
Thomas Gleixner9741f282011-02-06 20:20:36 +010047 __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA));
David Howells1bcbba32006-09-25 23:32:04 -070048}
49
Thomas Gleixner9741f282011-02-06 20:20:36 +010050static void frv_fpga_mask_ack(struct irq_data *d)
David Howells1bcbba32006-09-25 23:32:04 -070051{
David Howells88d6e192006-09-25 23:32:06 -070052 uint16_t imr = __get_IMR();
53
Thomas Gleixner9741f282011-02-06 20:20:36 +010054 imr |= 1 << (d->irq - IRQ_BASE_FPGA);
David Howells88d6e192006-09-25 23:32:06 -070055 __set_IMR(imr);
56
Thomas Gleixner9741f282011-02-06 20:20:36 +010057 __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA));
David Howells88d6e192006-09-25 23:32:06 -070058}
59
Thomas Gleixner9741f282011-02-06 20:20:36 +010060static void frv_fpga_unmask(struct irq_data *d)
David Howells88d6e192006-09-25 23:32:06 -070061{
62 uint16_t imr = __get_IMR();
63
Thomas Gleixner9741f282011-02-06 20:20:36 +010064 imr &= ~(1 << (d->irq - IRQ_BASE_FPGA));
David Howells88d6e192006-09-25 23:32:06 -070065
66 __set_IMR(imr);
David Howells1bcbba32006-09-25 23:32:04 -070067}
68
69static struct irq_chip frv_fpga_pic = {
70 .name = "mb93093",
Thomas Gleixner9741f282011-02-06 20:20:36 +010071 .irq_ack = frv_fpga_ack,
72 .irq_mask = frv_fpga_mask,
73 .irq_mask_ack = frv_fpga_mask_ack,
74 .irq_unmask = frv_fpga_unmask,
David Howells1bcbba32006-09-25 23:32:04 -070075};
76
77/*
78 * FPGA PIC interrupt handler
79 */
David Howells7d12e782006-10-05 14:55:46 +010080static irqreturn_t fpga_interrupt(int irq, void *_mask)
David Howells1bcbba32006-09-25 23:32:04 -070081{
82 uint16_t imr, mask = (unsigned long) _mask;
David Howells1bcbba32006-09-25 23:32:04 -070083
84 imr = __get_IMR();
85 mask = mask & ~imr & __get_IFR();
86
87 /* poll all the triggered IRQs */
88 while (mask) {
89 int irq;
90
91 asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask));
92 irq = 31 - irq;
93 mask &= ~(1 << irq);
94
Thomas Gleixner0f421c92011-02-06 20:20:34 +010095 generic_handle_irq(IRQ_BASE_FPGA + irq);
David Howells1bcbba32006-09-25 23:32:04 -070096 }
97
David Howells88d6e192006-09-25 23:32:06 -070098 return IRQ_HANDLED;
David Howells1bcbba32006-09-25 23:32:04 -070099}
100
101/*
102 * define an interrupt action for each FPGA PIC output
103 * - use dev_id to indicate the FPGA PIC input to output mappings
104 */
105static struct irqaction fpga_irq[1] = {
106 [0] = {
107 .handler = fpga_interrupt,
108 .flags = IRQF_DISABLED,
David Howells1bcbba32006-09-25 23:32:04 -0700109 .name = "fpga.0",
110 .dev_id = (void *) 0x0700UL,
111 }
112};
113
114/*
115 * initialise the motherboard FPGA's PIC
116 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117void __init fpga_init(void)
118{
David Howells1bcbba32006-09-25 23:32:04 -0700119 int irq;
120
121 /* all PIC inputs are all set to be edge triggered */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122 __set_IMR(0x0700);
123 __clr_IFR(0x0000);
124
David Howells1bcbba32006-09-25 23:32:04 -0700125 for (irq = IRQ_BASE_FPGA + 8; irq <= IRQ_BASE_FPGA + 10; irq++)
Thomas Gleixnerde2e95a2011-03-24 16:38:49 +0100126 irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq);
David Howells1bcbba32006-09-25 23:32:04 -0700127
128 /* the FPGA drives external IRQ input #2 on the CPU PIC */
129 setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[0]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130}