tree 4ca244d40929bac84b30f1c684253d9b5eb06630
parent 17879857821adad4e180c5d6457c3b8bbf1d0c0c
author Eric Millbrandt <emillbrandt@dekaresearch.com> 1281149358 -0600
committer Grant Likely <grant.likely@secretlab.ca> 1281149358 -0600

powerpc/5200: add mpc5200_psc_ac97_gpio_reset

Work around a silicon bug in the ac97 reset functionality of the
mpc5200(b).  The implementation of the ac97 "cold" reset is flawed.
If the sync and output lines are high when reset is asserted the
attached ac97 device may go into test mode.  Avoid this by
reconfiguring the psc to gpio mode and generating the reset manually.

From MPC5200B User's Manual:
"Some AC97 devices goes to a test mode, if the Sync line is high
during the Res line is low (reset phase). To avoid this behavior the
Sync line must be also forced to zero during the reset phase. To do
that, the pin muxing should switch to GPIO mode and the GPIO control
register should be used to control the output lines."

Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>