diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 36ed301..a562d24 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -2886,13 +2886,6 @@
 	caps->cmd_pause = false;
 	caps->cmd_terminate = true;
 
-	/*
-	 * This is the limit for transfers with a buswidth of 1, larger
-	 * buswidths will have larger limits.
-	 */
-	caps->max_sg_len = 1900800;
-	caps->max_sg_nr = 0;
-
 	return 0;
 }
 
@@ -3017,6 +3010,14 @@
 			"unable to register DMA to the generic DT DMA helpers\n");
 		}
 	}
+	/*
+	 * This is the limit for transfers with a buswidth of 1, larger
+	 * buswidths will have larger limits.
+	 */
+	ret = dma_set_max_seg_size(&adev->dev, 1900800);
+	if (ret)
+		dev_err(&adev->dev, "unable to set the seg size\n");
+
 
 	dev_info(&adev->dev,
 		"Loaded driver for PL330 DMAC-%d\n", adev->periphid);
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 13ac4f5..2601186 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -380,11 +380,6 @@
  * 	should be checked by controller as well
  * @cmd_pause: true, if pause and thereby resume is supported
  * @cmd_terminate: true, if terminate cmd is supported
- *
- * @max_sg_nr: maximum number of SG segments supported
- * 	0 for no maximum
- * @max_sg_len: maximum length of a SG segment supported
- * 	0 for no maximum
  */
 struct dma_slave_caps {
 	u32 src_addr_widths;
@@ -392,9 +387,6 @@
 	u32 directions;
 	bool cmd_pause;
 	bool cmd_terminate;
-
-	u32 max_sg_nr;
-	u32 max_sg_len;
 };
 
 static inline const char *dma_chan_name(struct dma_chan *chan)