tree ea2bf611c6112a0fe03d1277ab62cbfc51cded92
parent d7df2443cd5f67fc6ee7c05a88e4996e8177f91b
author Benjamin Herrenschmidt <benh@kernel.crashing.org> 1486346716 +1100
committer Michael Ellerman <mpe@ellerman.id.au> 1486612473 +1100

powerpc/mm/radix: Update ERAT flushes when invalidating TLB

Three tiny changes to the ERAT flushing logic: First don't make
it depend on DD1. It hasn't been decided yet but we might run
DD2 in a mode that also requires explicit flushes for performance
reasons so make it unconditional. We also add a missing isync, and
finally remove the flush from _tlbiel_va as it is only necessary
for congruence-class invalidations (PID, LPID and full TLB), not
targetted invalidations.

Fixes: 96ed1fe511a8 ("powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1")
Cc: stable@vger.kernel.org # v4.9+
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>