tree 3bf9b1a03b0af9c1b510ab7c2320eaddca0dd4bd
parent 039ae102a8d43bbaa00e678b37f58310f4674650
author John Garry <john.garry@huawei.com> 1475579471 +0800
committer Martin K. Petersen <martin.petersen@oracle.com> 1478644186 -0500

scsi: hisi_sas: Add v2 hw support for different refclk

The hip06 D03 and hip07 D05 boards have different reference clock
frequencies for the SAS controller.

Register PHY_CTRL needs to be programmed differently according to this
frequency, so add support for this.

The default register setting in PHY_CTRL is for 50MHz, so only update
this register when the refclk frequency is 66MHz.

For ACPI we expect the _RST handler to set the correct value for
PHY_CTRL (we're forced to take different approach for DT and ACPI as
ACPI does not support fixed-clock device).

Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>