tree b4d3fb9d0e444ea484bd76bf2a27cd990157ae97
parent 141c71dd2c00ca7d807138ece55a17c61085c793
author Tang Yuantian <yuantian.tang@freescale.com> 1390267965 +0800
committer Mike Turquette <mturquette@linaro.org> 1395273854 -0700

clk: mpc85xx: Update the driver to align to new clock bindings

The clock bindings for Freescale CoreNet platform are updated.
So, the driver needs to be updated accordingly.
The main changes include:
	- Added a new node to present the input system clock
	- Changed PLL and MUX's compatible string

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>