Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* linux/arch/arm/mach-s3c2410/mach-bast.c |
| 2 | * |
Ben Dooks | ccae941 | 2009-11-13 22:54:14 +0000 | [diff] [blame] | 3 | * Copyright 2003-2008 Simtec Electronics |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * |
| 6 | * http://www.simtec.co.uk/products/EB2410ITX/ |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/types.h> |
| 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/list.h> |
| 17 | #include <linux/timer.h> |
| 18 | #include <linux/init.h> |
Ben Dooks | ec976d6 | 2009-05-13 22:52:24 +0100 | [diff] [blame] | 19 | #include <linux/gpio.h> |
Rafael J. Wysocki | bb072c3 | 2011-04-22 22:03:21 +0200 | [diff] [blame] | 20 | #include <linux/syscore_ops.h> |
Ben Dooks | b6d1f54 | 2006-12-17 23:22:26 +0100 | [diff] [blame] | 21 | #include <linux/serial_core.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 22 | #include <linux/platform_device.h> |
Ben Dooks | d97a666 | 2005-06-23 21:56:47 +0100 | [diff] [blame] | 23 | #include <linux/dm9000.h> |
Ben Dooks | b7a12d1 | 2008-07-03 11:24:37 +0100 | [diff] [blame] | 24 | #include <linux/ata_platform.h> |
Ben Dooks | 042cf0f | 2008-07-03 11:24:41 +0100 | [diff] [blame] | 25 | #include <linux/i2c.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 26 | #include <linux/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | |
Ben Dooks | 5ce4b1f | 2007-07-12 10:44:53 +0100 | [diff] [blame] | 28 | #include <net/ax88796.h> |
| 29 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | #include <asm/mach/arch.h> |
| 31 | #include <asm/mach/map.h> |
| 32 | #include <asm/mach/irq.h> |
| 33 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 34 | #include <mach/bast-map.h> |
| 35 | #include <mach/bast-irq.h> |
| 36 | #include <mach/bast-cpld.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 38 | #include <mach/hardware.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | #include <asm/irq.h> |
| 40 | #include <asm/mach-types.h> |
| 41 | |
| 42 | //#include <asm/debug-ll.h> |
Ben Dooks | a2b7ba9 | 2008-10-07 22:26:09 +0100 | [diff] [blame] | 43 | #include <plat/regs-serial.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 44 | #include <mach/regs-gpio.h> |
| 45 | #include <mach/regs-mem.h> |
| 46 | #include <mach/regs-lcd.h> |
Ben Dooks | 58c8d57 | 2005-10-28 15:31:46 +0100 | [diff] [blame] | 47 | |
Arnd Bergmann | 436d42c | 2012-08-24 15:22:12 +0200 | [diff] [blame] | 48 | #include <linux/platform_data/hwmon-s3c.h> |
| 49 | #include <linux/platform_data/mtd-nand-s3c2410.h> |
| 50 | #include <linux/platform_data/i2c-s3c2410.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 51 | #include <mach/fb.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
| 53 | #include <linux/mtd/mtd.h> |
| 54 | #include <linux/mtd/nand.h> |
| 55 | #include <linux/mtd/nand_ecc.h> |
| 56 | #include <linux/mtd/partitions.h> |
| 57 | |
Ben Dooks | 65cc337 | 2005-07-18 10:24:32 +0100 | [diff] [blame] | 58 | #include <linux/serial_8250.h> |
| 59 | |
Ben Dooks | d5120ae | 2008-10-07 23:09:51 +0100 | [diff] [blame] | 60 | #include <plat/clock.h> |
Ben Dooks | a2b7ba9 | 2008-10-07 22:26:09 +0100 | [diff] [blame] | 61 | #include <plat/devs.h> |
| 62 | #include <plat/cpu.h> |
Ben Dooks | ca0b490 | 2009-07-30 23:23:39 +0100 | [diff] [blame] | 63 | #include <plat/cpu-freq.h> |
Ben Dooks | 40b956f | 2010-05-04 14:38:49 +0900 | [diff] [blame] | 64 | #include <plat/gpio-cfg.h> |
Arnd Bergmann | 436d42c | 2012-08-24 15:22:12 +0200 | [diff] [blame] | 65 | #include <linux/platform_data/asoc-s3c24xx_simtec.h> |
Ben Dooks | 9d529c6 | 2008-07-03 11:24:39 +0100 | [diff] [blame] | 66 | |
Heiko Stuebner | ec2cc75 | 2012-03-07 01:47:11 -0800 | [diff] [blame] | 67 | #include "simtec.h" |
Kukjin Kim | b27b072 | 2012-01-03 14:02:03 +0100 | [diff] [blame] | 68 | #include "common.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | |
Ben Dooks | ccae941 | 2009-11-13 22:54:14 +0000 | [diff] [blame] | 70 | #define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | |
| 72 | /* macros for virtual address mods for the io space entries */ |
| 73 | #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) |
| 74 | #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4) |
| 75 | #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3) |
| 76 | #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2) |
| 77 | |
| 78 | /* macros to modify the physical addresses for io space */ |
| 79 | |
Ben Dooks | 1d23b65 | 2005-11-08 19:15:31 +0000 | [diff] [blame] | 80 | #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2)) |
| 81 | #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3)) |
| 82 | #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4)) |
| 83 | #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | |
| 85 | static struct map_desc bast_iodesc[] __initdata = { |
| 86 | /* ISA IO areas */ |
Ben Dooks | 1d23b65 | 2005-11-08 19:15:31 +0000 | [diff] [blame] | 87 | { |
| 88 | .virtual = (u32)S3C24XX_VA_ISA_BYTE, |
| 89 | .pfn = PA_CS2(BAST_PA_ISAIO), |
| 90 | .length = SZ_16M, |
| 91 | .type = MT_DEVICE, |
| 92 | }, { |
| 93 | .virtual = (u32)S3C24XX_VA_ISA_WORD, |
| 94 | .pfn = PA_CS3(BAST_PA_ISAIO), |
| 95 | .length = SZ_16M, |
| 96 | .type = MT_DEVICE, |
| 97 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | /* bast CPLD control registers, and external interrupt controls */ |
Ben Dooks | 1d23b65 | 2005-11-08 19:15:31 +0000 | [diff] [blame] | 99 | { |
| 100 | .virtual = (u32)BAST_VA_CTRL1, |
| 101 | .pfn = __phys_to_pfn(BAST_PA_CTRL1), |
| 102 | .length = SZ_1M, |
| 103 | .type = MT_DEVICE, |
| 104 | }, { |
| 105 | .virtual = (u32)BAST_VA_CTRL2, |
| 106 | .pfn = __phys_to_pfn(BAST_PA_CTRL2), |
| 107 | .length = SZ_1M, |
| 108 | .type = MT_DEVICE, |
| 109 | }, { |
| 110 | .virtual = (u32)BAST_VA_CTRL3, |
| 111 | .pfn = __phys_to_pfn(BAST_PA_CTRL3), |
| 112 | .length = SZ_1M, |
| 113 | .type = MT_DEVICE, |
| 114 | }, { |
| 115 | .virtual = (u32)BAST_VA_CTRL4, |
| 116 | .pfn = __phys_to_pfn(BAST_PA_CTRL4), |
| 117 | .length = SZ_1M, |
| 118 | .type = MT_DEVICE, |
| 119 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | /* PC104 IRQ mux */ |
Ben Dooks | 1d23b65 | 2005-11-08 19:15:31 +0000 | [diff] [blame] | 121 | { |
| 122 | .virtual = (u32)BAST_VA_PC104_IRQREQ, |
| 123 | .pfn = __phys_to_pfn(BAST_PA_PC104_IRQREQ), |
| 124 | .length = SZ_1M, |
| 125 | .type = MT_DEVICE, |
| 126 | }, { |
| 127 | .virtual = (u32)BAST_VA_PC104_IRQRAW, |
| 128 | .pfn = __phys_to_pfn(BAST_PA_PC104_IRQRAW), |
| 129 | .length = SZ_1M, |
| 130 | .type = MT_DEVICE, |
| 131 | }, { |
| 132 | .virtual = (u32)BAST_VA_PC104_IRQMASK, |
| 133 | .pfn = __phys_to_pfn(BAST_PA_PC104_IRQMASK), |
| 134 | .length = SZ_1M, |
| 135 | .type = MT_DEVICE, |
| 136 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | |
| 138 | /* peripheral space... one for each of fast/slow/byte/16bit */ |
| 139 | /* note, ide is only decoded in word space, even though some registers |
| 140 | * are only 8bit */ |
| 141 | |
| 142 | /* slow, byte */ |
| 143 | { VA_C2(BAST_VA_ISAIO), PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, |
| 144 | { VA_C2(BAST_VA_ISAMEM), PA_CS2(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | { VA_C2(BAST_VA_SUPERIO), PA_CS2(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | |
| 147 | /* slow, word */ |
| 148 | { VA_C3(BAST_VA_ISAIO), PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, |
| 149 | { VA_C3(BAST_VA_ISAMEM), PA_CS3(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | { VA_C3(BAST_VA_SUPERIO), PA_CS3(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | |
| 152 | /* fast, byte */ |
| 153 | { VA_C4(BAST_VA_ISAIO), PA_CS4(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, |
| 154 | { VA_C4(BAST_VA_ISAMEM), PA_CS4(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | { VA_C4(BAST_VA_SUPERIO), PA_CS4(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | |
| 157 | /* fast, word */ |
| 158 | { VA_C5(BAST_VA_ISAIO), PA_CS5(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, |
| 159 | { VA_C5(BAST_VA_ISAMEM), PA_CS5(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 160 | { VA_C5(BAST_VA_SUPERIO), PA_CS5(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | }; |
| 162 | |
| 163 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK |
| 164 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
| 165 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
| 166 | |
Ben Dooks | 66a9b49 | 2006-06-18 23:04:05 +0100 | [diff] [blame] | 167 | static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 168 | [0] = { |
| 169 | .hwport = 0, |
| 170 | .flags = 0, |
| 171 | .ucon = UCON, |
| 172 | .ulcon = ULCON, |
| 173 | .ufcon = UFCON, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | }, |
| 175 | [1] = { |
| 176 | .hwport = 1, |
| 177 | .flags = 0, |
| 178 | .ucon = UCON, |
| 179 | .ulcon = ULCON, |
| 180 | .ufcon = UFCON, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | }, |
| 182 | /* port 2 is not actually used */ |
| 183 | [2] = { |
| 184 | .hwport = 2, |
| 185 | .flags = 0, |
| 186 | .ucon = UCON, |
| 187 | .ulcon = ULCON, |
| 188 | .ufcon = UFCON, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | } |
| 190 | }; |
| 191 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 192 | /* NAND Flash on BAST board */ |
| 193 | |
Ben Dooks | 6ddc4b0 | 2008-04-16 00:06:14 +0100 | [diff] [blame] | 194 | #ifdef CONFIG_PM |
Rafael J. Wysocki | bb072c3 | 2011-04-22 22:03:21 +0200 | [diff] [blame] | 195 | static int bast_pm_suspend(void) |
Ben Dooks | 6ddc4b0 | 2008-04-16 00:06:14 +0100 | [diff] [blame] | 196 | { |
| 197 | /* ensure that an nRESET is not generated on resume. */ |
Ben Dooks | 408c8b8 | 2010-05-04 12:49:04 +0900 | [diff] [blame] | 198 | gpio_direction_output(S3C2410_GPA(21), 1); |
Ben Dooks | 6ddc4b0 | 2008-04-16 00:06:14 +0100 | [diff] [blame] | 199 | return 0; |
| 200 | } |
| 201 | |
Rafael J. Wysocki | bb072c3 | 2011-04-22 22:03:21 +0200 | [diff] [blame] | 202 | static void bast_pm_resume(void) |
Ben Dooks | 6ddc4b0 | 2008-04-16 00:06:14 +0100 | [diff] [blame] | 203 | { |
Ben Dooks | 40b956f | 2010-05-04 14:38:49 +0900 | [diff] [blame] | 204 | s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT); |
Ben Dooks | 6ddc4b0 | 2008-04-16 00:06:14 +0100 | [diff] [blame] | 205 | } |
| 206 | |
| 207 | #else |
| 208 | #define bast_pm_suspend NULL |
| 209 | #define bast_pm_resume NULL |
| 210 | #endif |
| 211 | |
Rafael J. Wysocki | bb072c3 | 2011-04-22 22:03:21 +0200 | [diff] [blame] | 212 | static struct syscore_ops bast_pm_syscore_ops = { |
Ben Dooks | 6ddc4b0 | 2008-04-16 00:06:14 +0100 | [diff] [blame] | 213 | .suspend = bast_pm_suspend, |
| 214 | .resume = bast_pm_resume, |
| 215 | }; |
| 216 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 217 | static int smartmedia_map[] = { 0 }; |
| 218 | static int chip0_map[] = { 1 }; |
| 219 | static int chip1_map[] = { 2 }; |
| 220 | static int chip2_map[] = { 3 }; |
| 221 | |
Ben Dooks | 2a3a180 | 2009-09-28 13:59:49 +0300 | [diff] [blame] | 222 | static struct mtd_partition __initdata bast_default_nand_part[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 223 | [0] = { |
| 224 | .name = "Boot Agent", |
| 225 | .size = SZ_16K, |
Ben Dooks | b526bf2 | 2005-11-16 15:05:12 +0000 | [diff] [blame] | 226 | .offset = 0, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | }, |
| 228 | [1] = { |
| 229 | .name = "/boot", |
| 230 | .size = SZ_4M - SZ_16K, |
| 231 | .offset = SZ_16K, |
| 232 | }, |
| 233 | [2] = { |
| 234 | .name = "user", |
| 235 | .offset = SZ_4M, |
| 236 | .size = MTDPART_SIZ_FULL, |
| 237 | } |
| 238 | }; |
| 239 | |
| 240 | /* the bast has 4 selectable slots for nand-flash, the three |
| 241 | * on-board chip areas, as well as the external SmartMedia |
| 242 | * slot. |
| 243 | * |
| 244 | * Note, there is no current hot-plug support for the SmartMedia |
| 245 | * socket. |
| 246 | */ |
| 247 | |
Ben Dooks | 2a3a180 | 2009-09-28 13:59:49 +0300 | [diff] [blame] | 248 | static struct s3c2410_nand_set __initdata bast_nand_sets[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 249 | [0] = { |
| 250 | .name = "SmartMedia", |
| 251 | .nr_chips = 1, |
| 252 | .nr_map = smartmedia_map, |
Ben Dooks | d3ef7ee | 2009-12-23 19:25:02 +0000 | [diff] [blame] | 253 | .options = NAND_SCAN_SILENT_NODEV, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 254 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), |
Ben Dooks | b526bf2 | 2005-11-16 15:05:12 +0000 | [diff] [blame] | 255 | .partitions = bast_default_nand_part, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | }, |
| 257 | [1] = { |
| 258 | .name = "chip0", |
| 259 | .nr_chips = 1, |
| 260 | .nr_map = chip0_map, |
| 261 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), |
Ben Dooks | b526bf2 | 2005-11-16 15:05:12 +0000 | [diff] [blame] | 262 | .partitions = bast_default_nand_part, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | }, |
| 264 | [2] = { |
| 265 | .name = "chip1", |
| 266 | .nr_chips = 1, |
| 267 | .nr_map = chip1_map, |
Ben Dooks | d3ef7ee | 2009-12-23 19:25:02 +0000 | [diff] [blame] | 268 | .options = NAND_SCAN_SILENT_NODEV, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 269 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), |
Ben Dooks | b526bf2 | 2005-11-16 15:05:12 +0000 | [diff] [blame] | 270 | .partitions = bast_default_nand_part, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 271 | }, |
| 272 | [3] = { |
| 273 | .name = "chip2", |
| 274 | .nr_chips = 1, |
| 275 | .nr_map = chip2_map, |
Ben Dooks | d3ef7ee | 2009-12-23 19:25:02 +0000 | [diff] [blame] | 276 | .options = NAND_SCAN_SILENT_NODEV, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), |
Ben Dooks | b526bf2 | 2005-11-16 15:05:12 +0000 | [diff] [blame] | 278 | .partitions = bast_default_nand_part, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 279 | } |
| 280 | }; |
| 281 | |
| 282 | static void bast_nand_select(struct s3c2410_nand_set *set, int slot) |
| 283 | { |
| 284 | unsigned int tmp; |
| 285 | |
| 286 | slot = set->nr_map[slot] & 3; |
| 287 | |
| 288 | pr_debug("bast_nand: selecting slot %d (set %p,%p)\n", |
| 289 | slot, set, set->nr_map); |
| 290 | |
| 291 | tmp = __raw_readb(BAST_VA_CTRL2); |
| 292 | tmp &= BAST_CPLD_CTLR2_IDERST; |
| 293 | tmp |= slot; |
| 294 | tmp |= BAST_CPLD_CTRL2_WNAND; |
| 295 | |
| 296 | pr_debug("bast_nand: ctrl2 now %02x\n", tmp); |
| 297 | |
| 298 | __raw_writeb(tmp, BAST_VA_CTRL2); |
| 299 | } |
| 300 | |
Ben Dooks | 2a3a180 | 2009-09-28 13:59:49 +0300 | [diff] [blame] | 301 | static struct s3c2410_platform_nand __initdata bast_nand_info = { |
Ben Dooks | b048dbf | 2005-10-20 23:21:19 +0100 | [diff] [blame] | 302 | .tacls = 30, |
| 303 | .twrph0 = 60, |
| 304 | .twrph1 = 60, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 305 | .nr_sets = ARRAY_SIZE(bast_nand_sets), |
| 306 | .sets = bast_nand_sets, |
| 307 | .select_chip = bast_nand_select, |
| 308 | }; |
| 309 | |
Ben Dooks | d97a666 | 2005-06-23 21:56:47 +0100 | [diff] [blame] | 310 | /* DM9000 */ |
| 311 | |
| 312 | static struct resource bast_dm9k_resource[] = { |
Tushar Behera | 52df44d | 2012-05-12 16:12:21 +0900 | [diff] [blame] | 313 | [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000, 4), |
| 314 | [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000 + 0x40, 0x40), |
| 315 | [2] = DEFINE_RES_NAMED(IRQ_DM9000 , 1, NULL, IORESOURCE_IRQ \ |
| 316 | | IORESOURCE_IRQ_HIGHLEVEL), |
Ben Dooks | d97a666 | 2005-06-23 21:56:47 +0100 | [diff] [blame] | 317 | }; |
| 318 | |
| 319 | /* for the moment we limit ourselves to 16bit IO until some |
| 320 | * better IO routines can be written and tested |
| 321 | */ |
| 322 | |
Ben Dooks | 9f693d7 | 2005-10-12 19:58:07 +0100 | [diff] [blame] | 323 | static struct dm9000_plat_data bast_dm9k_platdata = { |
Ben Dooks | b526bf2 | 2005-11-16 15:05:12 +0000 | [diff] [blame] | 324 | .flags = DM9000_PLATF_16BITONLY, |
Ben Dooks | d97a666 | 2005-06-23 21:56:47 +0100 | [diff] [blame] | 325 | }; |
| 326 | |
| 327 | static struct platform_device bast_device_dm9k = { |
| 328 | .name = "dm9000", |
| 329 | .id = 0, |
| 330 | .num_resources = ARRAY_SIZE(bast_dm9k_resource), |
| 331 | .resource = bast_dm9k_resource, |
| 332 | .dev = { |
| 333 | .platform_data = &bast_dm9k_platdata, |
| 334 | } |
| 335 | }; |
| 336 | |
Ben Dooks | 65cc337 | 2005-07-18 10:24:32 +0100 | [diff] [blame] | 337 | /* serial devices */ |
| 338 | |
| 339 | #define SERIAL_BASE (S3C2410_CS2 + BAST_PA_SUPERIO) |
| 340 | #define SERIAL_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SHARE_IRQ) |
| 341 | #define SERIAL_CLK (1843200) |
| 342 | |
| 343 | static struct plat_serial8250_port bast_sio_data[] = { |
| 344 | [0] = { |
| 345 | .mapbase = SERIAL_BASE + 0x2f8, |
| 346 | .irq = IRQ_PCSERIAL1, |
| 347 | .flags = SERIAL_FLAGS, |
| 348 | .iotype = UPIO_MEM, |
| 349 | .regshift = 0, |
| 350 | .uartclk = SERIAL_CLK, |
| 351 | }, |
| 352 | [1] = { |
| 353 | .mapbase = SERIAL_BASE + 0x3f8, |
| 354 | .irq = IRQ_PCSERIAL2, |
| 355 | .flags = SERIAL_FLAGS, |
| 356 | .iotype = UPIO_MEM, |
| 357 | .regshift = 0, |
| 358 | .uartclk = SERIAL_CLK, |
| 359 | }, |
| 360 | { } |
| 361 | }; |
| 362 | |
| 363 | static struct platform_device bast_sio = { |
| 364 | .name = "serial8250", |
Russell King | 6df29de | 2005-09-08 16:04:41 +0100 | [diff] [blame] | 365 | .id = PLAT8250_DEV_PLATFORM, |
Ben Dooks | 65cc337 | 2005-07-18 10:24:32 +0100 | [diff] [blame] | 366 | .dev = { |
| 367 | .platform_data = &bast_sio_data, |
| 368 | }, |
| 369 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | |
Ben Dooks | 1fcf844 | 2005-08-03 19:49:16 +0100 | [diff] [blame] | 371 | /* we have devices on the bus which cannot work much over the |
| 372 | * standard 100KHz i2c bus frequency |
| 373 | */ |
| 374 | |
Ben Dooks | 3e1b776 | 2008-10-31 16:14:40 +0000 | [diff] [blame] | 375 | static struct s3c2410_platform_i2c __initdata bast_i2c_info = { |
Ben Dooks | 1fcf844 | 2005-08-03 19:49:16 +0100 | [diff] [blame] | 376 | .flags = 0, |
| 377 | .slave_addr = 0x10, |
Daniel Silverstone | c564e6a | 2009-03-13 13:53:46 +0000 | [diff] [blame] | 378 | .frequency = 100*1000, |
Ben Dooks | 1fcf844 | 2005-08-03 19:49:16 +0100 | [diff] [blame] | 379 | }; |
| 380 | |
Ben Dooks | 5ce4b1f | 2007-07-12 10:44:53 +0100 | [diff] [blame] | 381 | /* Asix AX88796 10/100 ethernet controller */ |
| 382 | |
| 383 | static struct ax_plat_data bast_asix_platdata = { |
| 384 | .flags = AXFLG_MAC_FROMDEV, |
| 385 | .wordlength = 2, |
| 386 | .dcr_val = 0x48, |
| 387 | .rcr_val = 0x40, |
| 388 | }; |
| 389 | |
| 390 | static struct resource bast_asix_resource[] = { |
Tushar Behera | 52df44d | 2012-05-12 16:12:21 +0900 | [diff] [blame] | 391 | [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET, 0x18 * 0x20), |
| 392 | [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), 1), |
| 393 | [2] = DEFINE_RES_IRQ(IRQ_ASIX), |
Ben Dooks | 5ce4b1f | 2007-07-12 10:44:53 +0100 | [diff] [blame] | 394 | }; |
| 395 | |
| 396 | static struct platform_device bast_device_asix = { |
| 397 | .name = "ax88796", |
| 398 | .id = 0, |
| 399 | .num_resources = ARRAY_SIZE(bast_asix_resource), |
| 400 | .resource = bast_asix_resource, |
| 401 | .dev = { |
| 402 | .platform_data = &bast_asix_platdata |
| 403 | } |
| 404 | }; |
| 405 | |
| 406 | /* Asix AX88796 10/100 ethernet controller parallel port */ |
| 407 | |
| 408 | static struct resource bast_asixpp_resource[] = { |
Tushar Behera | 52df44d | 2012-05-12 16:12:21 +0900 | [diff] [blame] | 409 | [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20), \ |
| 410 | 0x30 * 0x20), |
Ben Dooks | 5ce4b1f | 2007-07-12 10:44:53 +0100 | [diff] [blame] | 411 | }; |
| 412 | |
| 413 | static struct platform_device bast_device_axpp = { |
| 414 | .name = "ax88796-pp", |
| 415 | .id = 0, |
| 416 | .num_resources = ARRAY_SIZE(bast_asixpp_resource), |
| 417 | .resource = bast_asixpp_resource, |
| 418 | }; |
| 419 | |
| 420 | /* LCD/VGA controller */ |
Ben Dooks | 58c8d57 | 2005-10-28 15:31:46 +0100 | [diff] [blame] | 421 | |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 422 | static struct s3c2410fb_display __initdata bast_lcd_info[] = { |
| 423 | { |
Krzysztof Helt | 1f41153 | 2007-10-16 01:28:57 -0700 | [diff] [blame] | 424 | .type = S3C2410_LCDCON1_TFT, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 425 | .width = 640, |
| 426 | .height = 480, |
Krzysztof Helt | 5f20f69 | 2007-10-16 01:28:59 -0700 | [diff] [blame] | 427 | |
Krzysztof Helt | 6981669 | 2007-10-16 01:29:06 -0700 | [diff] [blame] | 428 | .pixclock = 33333, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 429 | .xres = 640, |
| 430 | .yres = 480, |
| 431 | .bpp = 4, |
Krzysztof Helt | 1f41153 | 2007-10-16 01:28:57 -0700 | [diff] [blame] | 432 | .left_margin = 40, |
| 433 | .right_margin = 20, |
Krzysztof Helt | 93d11f5 | 2007-10-16 01:29:00 -0700 | [diff] [blame] | 434 | .hsync_len = 88, |
Krzysztof Helt | 5f20f69 | 2007-10-16 01:28:59 -0700 | [diff] [blame] | 435 | .upper_margin = 30, |
| 436 | .lower_margin = 32, |
Krzysztof Helt | 93d11f5 | 2007-10-16 01:29:00 -0700 | [diff] [blame] | 437 | .vsync_len = 3, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 438 | |
Krzysztof Helt | f28ef57 | 2007-10-16 01:28:58 -0700 | [diff] [blame] | 439 | .lcdcon5 = 0x00014b02, |
Ben Dooks | 58c8d57 | 2005-10-28 15:31:46 +0100 | [diff] [blame] | 440 | }, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 441 | { |
Krzysztof Helt | 1f41153 | 2007-10-16 01:28:57 -0700 | [diff] [blame] | 442 | .type = S3C2410_LCDCON1_TFT, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 443 | .width = 640, |
| 444 | .height = 480, |
Ben Dooks | 58c8d57 | 2005-10-28 15:31:46 +0100 | [diff] [blame] | 445 | |
Krzysztof Helt | 6981669 | 2007-10-16 01:29:06 -0700 | [diff] [blame] | 446 | .pixclock = 33333, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 447 | .xres = 640, |
| 448 | .yres = 480, |
| 449 | .bpp = 8, |
Krzysztof Helt | 1f41153 | 2007-10-16 01:28:57 -0700 | [diff] [blame] | 450 | .left_margin = 40, |
| 451 | .right_margin = 20, |
Krzysztof Helt | 93d11f5 | 2007-10-16 01:29:00 -0700 | [diff] [blame] | 452 | .hsync_len = 88, |
Krzysztof Helt | 5f20f69 | 2007-10-16 01:28:59 -0700 | [diff] [blame] | 453 | .upper_margin = 30, |
| 454 | .lower_margin = 32, |
Krzysztof Helt | 93d11f5 | 2007-10-16 01:29:00 -0700 | [diff] [blame] | 455 | .vsync_len = 3, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 456 | |
Krzysztof Helt | f28ef57 | 2007-10-16 01:28:58 -0700 | [diff] [blame] | 457 | .lcdcon5 = 0x00014b02, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 458 | }, |
| 459 | { |
Krzysztof Helt | 1f41153 | 2007-10-16 01:28:57 -0700 | [diff] [blame] | 460 | .type = S3C2410_LCDCON1_TFT, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 461 | .width = 640, |
| 462 | .height = 480, |
| 463 | |
Krzysztof Helt | 6981669 | 2007-10-16 01:29:06 -0700 | [diff] [blame] | 464 | .pixclock = 33333, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 465 | .xres = 640, |
| 466 | .yres = 480, |
| 467 | .bpp = 16, |
Krzysztof Helt | 1f41153 | 2007-10-16 01:28:57 -0700 | [diff] [blame] | 468 | .left_margin = 40, |
| 469 | .right_margin = 20, |
Krzysztof Helt | 93d11f5 | 2007-10-16 01:29:00 -0700 | [diff] [blame] | 470 | .hsync_len = 88, |
Krzysztof Helt | 5f20f69 | 2007-10-16 01:28:59 -0700 | [diff] [blame] | 471 | .upper_margin = 30, |
| 472 | .lower_margin = 32, |
Krzysztof Helt | 93d11f5 | 2007-10-16 01:29:00 -0700 | [diff] [blame] | 473 | .vsync_len = 3, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 474 | |
Krzysztof Helt | f28ef57 | 2007-10-16 01:28:58 -0700 | [diff] [blame] | 475 | .lcdcon5 = 0x00014b02, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 476 | }, |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 477 | }; |
| 478 | |
| 479 | /* LCD/VGA controller */ |
| 480 | |
| 481 | static struct s3c2410fb_mach_info __initdata bast_fb_info = { |
| 482 | |
| 483 | .displays = bast_lcd_info, |
| 484 | .num_displays = ARRAY_SIZE(bast_lcd_info), |
Ben Dooks | 9cbae12 | 2007-12-23 03:09:38 +0100 | [diff] [blame] | 485 | .default_display = 1, |
Ben Dooks | 58c8d57 | 2005-10-28 15:31:46 +0100 | [diff] [blame] | 486 | }; |
| 487 | |
Ben Dooks | 042cf0f | 2008-07-03 11:24:41 +0100 | [diff] [blame] | 488 | /* I2C devices fitted. */ |
| 489 | |
| 490 | static struct i2c_board_info bast_i2c_devs[] __initdata = { |
| 491 | { |
| 492 | I2C_BOARD_INFO("tlv320aic23", 0x1a), |
| 493 | }, { |
| 494 | I2C_BOARD_INFO("simtec-pmu", 0x6b), |
| 495 | }, { |
| 496 | I2C_BOARD_INFO("ch7013", 0x75), |
| 497 | }, |
| 498 | }; |
Ben Dooks | b7a12d1 | 2008-07-03 11:24:37 +0100 | [diff] [blame] | 499 | |
Ben Dooks | 885f9eb | 2009-07-18 10:12:26 +0100 | [diff] [blame] | 500 | static struct s3c_hwmon_pdata bast_hwmon_info = { |
| 501 | /* LCD contrast (0-6.6V) */ |
| 502 | .in[0] = &(struct s3c_hwmon_chcfg) { |
| 503 | .name = "lcd-contrast", |
| 504 | .mult = 3300, |
| 505 | .div = 512, |
| 506 | }, |
| 507 | /* LED current feedback */ |
| 508 | .in[1] = &(struct s3c_hwmon_chcfg) { |
| 509 | .name = "led-feedback", |
| 510 | .mult = 3300, |
| 511 | .div = 1024, |
| 512 | }, |
| 513 | /* LCD feedback (0-6.6V) */ |
| 514 | .in[2] = &(struct s3c_hwmon_chcfg) { |
| 515 | .name = "lcd-feedback", |
| 516 | .mult = 3300, |
| 517 | .div = 512, |
| 518 | }, |
| 519 | /* Vcore (1.8-2.0V), Vref 3.3V */ |
| 520 | .in[3] = &(struct s3c_hwmon_chcfg) { |
| 521 | .name = "vcore", |
| 522 | .mult = 3300, |
| 523 | .div = 1024, |
| 524 | }, |
| 525 | }; |
| 526 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 527 | /* Standard BAST devices */ |
Ben Dooks | 885f9eb | 2009-07-18 10:12:26 +0100 | [diff] [blame] | 528 | // cat /sys/devices/platform/s3c24xx-adc/s3c-hwmon/in_0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 529 | |
| 530 | static struct platform_device *bast_devices[] __initdata = { |
Ben Dooks | b813248 | 2009-11-23 00:13:39 +0000 | [diff] [blame] | 531 | &s3c_device_ohci, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 532 | &s3c_device_lcd, |
| 533 | &s3c_device_wdt, |
Ben Dooks | 3e1b776 | 2008-10-31 16:14:40 +0000 | [diff] [blame] | 534 | &s3c_device_i2c0, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 535 | &s3c_device_rtc, |
| 536 | &s3c_device_nand, |
Ben Dooks | 885f9eb | 2009-07-18 10:12:26 +0100 | [diff] [blame] | 537 | &s3c_device_adc, |
| 538 | &s3c_device_hwmon, |
Ben Dooks | d97a666 | 2005-06-23 21:56:47 +0100 | [diff] [blame] | 539 | &bast_device_dm9k, |
Ben Dooks | 5ce4b1f | 2007-07-12 10:44:53 +0100 | [diff] [blame] | 540 | &bast_device_asix, |
| 541 | &bast_device_axpp, |
Ben Dooks | 65cc337 | 2005-07-18 10:24:32 +0100 | [diff] [blame] | 542 | &bast_sio, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 543 | }; |
| 544 | |
Ben Dooks | 2bc7509 | 2008-07-15 17:17:48 +0100 | [diff] [blame] | 545 | static struct clk *bast_clocks[] __initdata = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | &s3c24xx_dclk0, |
| 547 | &s3c24xx_dclk1, |
| 548 | &s3c24xx_clkout0, |
| 549 | &s3c24xx_clkout1, |
| 550 | &s3c24xx_uclk, |
| 551 | }; |
| 552 | |
Ben Dooks | ca0b490 | 2009-07-30 23:23:39 +0100 | [diff] [blame] | 553 | static struct s3c_cpufreq_board __initdata bast_cpufreq = { |
| 554 | .refresh = 7800, /* 7.8usec */ |
| 555 | .auto_io = 1, |
| 556 | .need_io = 1, |
| 557 | }; |
| 558 | |
Ben Dooks | 4d3a346 | 2009-11-13 22:34:20 +0000 | [diff] [blame] | 559 | static struct s3c24xx_audio_simtec_pdata __initdata bast_audio = { |
| 560 | .have_mic = 1, |
| 561 | .have_lout = 1, |
| 562 | }; |
| 563 | |
Ben Dooks | 5fe10ab | 2005-09-20 17:24:33 +0100 | [diff] [blame] | 564 | static void __init bast_map_io(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 565 | { |
| 566 | /* initialise the clocks */ |
| 567 | |
Ben Dooks | d96a980 | 2008-04-16 00:12:39 +0100 | [diff] [blame] | 568 | s3c24xx_dclk0.parent = &clk_upll; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | s3c24xx_dclk0.rate = 12*1000*1000; |
| 570 | |
Ben Dooks | d96a980 | 2008-04-16 00:12:39 +0100 | [diff] [blame] | 571 | s3c24xx_dclk1.parent = &clk_upll; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 572 | s3c24xx_dclk1.rate = 24*1000*1000; |
| 573 | |
| 574 | s3c24xx_clkout0.parent = &s3c24xx_dclk0; |
| 575 | s3c24xx_clkout1.parent = &s3c24xx_dclk1; |
| 576 | |
| 577 | s3c24xx_uclk.parent = &s3c24xx_clkout1; |
| 578 | |
Ben Dooks | ce89c20 | 2007-04-20 11:15:27 +0100 | [diff] [blame] | 579 | s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks)); |
| 580 | |
Maurus Cuelenaere | 6cd82ff | 2010-05-04 13:12:32 +0200 | [diff] [blame] | 581 | s3c_hwmon_set_platdata(&bast_hwmon_info); |
Ben Dooks | 3e1b776 | 2008-10-31 16:14:40 +0000 | [diff] [blame] | 582 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 583 | s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); |
| 584 | s3c24xx_init_clocks(0); |
| 585 | s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | } |
| 587 | |
Ben Dooks | 58c8d57 | 2005-10-28 15:31:46 +0100 | [diff] [blame] | 588 | static void __init bast_init(void) |
| 589 | { |
Rafael J. Wysocki | bb072c3 | 2011-04-22 22:03:21 +0200 | [diff] [blame] | 590 | register_syscore_ops(&bast_pm_syscore_ops); |
Ben Dooks | 6ddc4b0 | 2008-04-16 00:06:14 +0100 | [diff] [blame] | 591 | |
Ben Dooks | a8af6de | 2009-05-15 14:57:09 +0100 | [diff] [blame] | 592 | s3c_i2c0_set_platdata(&bast_i2c_info); |
Ben Dooks | 2a3a180 | 2009-09-28 13:59:49 +0300 | [diff] [blame] | 593 | s3c_nand_set_platdata(&bast_nand_info); |
Krzysztof Helt | 09fe75f | 2007-10-16 01:28:56 -0700 | [diff] [blame] | 594 | s3c24xx_fb_set_platdata(&bast_fb_info); |
Ben Dooks | 57e5171 | 2007-04-20 11:19:16 +0100 | [diff] [blame] | 595 | platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices)); |
Ben Dooks | 9d529c6 | 2008-07-03 11:24:39 +0100 | [diff] [blame] | 596 | |
Ben Dooks | 042cf0f | 2008-07-03 11:24:41 +0100 | [diff] [blame] | 597 | i2c_register_board_info(0, bast_i2c_devs, |
| 598 | ARRAY_SIZE(bast_i2c_devs)); |
| 599 | |
Ben Dooks | 7a05a2c | 2009-05-18 20:15:01 +0100 | [diff] [blame] | 600 | usb_simtec_init(); |
Ben Dooks | 9d529c6 | 2008-07-03 11:24:39 +0100 | [diff] [blame] | 601 | nor_simtec_init(); |
Ben Dooks | 4d3a346 | 2009-11-13 22:34:20 +0000 | [diff] [blame] | 602 | simtec_audio_add(NULL, true, &bast_audio); |
Ben Dooks | ca0b490 | 2009-07-30 23:23:39 +0100 | [diff] [blame] | 603 | |
Ben Dooks | 408c8b8 | 2010-05-04 12:49:04 +0900 | [diff] [blame] | 604 | WARN_ON(gpio_request(S3C2410_GPA(21), "bast nreset")); |
| 605 | |
Ben Dooks | ca0b490 | 2009-07-30 23:23:39 +0100 | [diff] [blame] | 606 | s3c_cpufreq_setboard(&bast_cpufreq); |
Ben Dooks | 58c8d57 | 2005-10-28 15:31:46 +0100 | [diff] [blame] | 607 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 608 | |
| 609 | MACHINE_START(BAST, "Simtec-BAST") |
Russell King | e9dea0c | 2005-07-03 17:38:58 +0100 | [diff] [blame] | 610 | /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ |
Nicolas Pitre | 69d5071 | 2011-07-05 22:38:17 -0400 | [diff] [blame] | 611 | .atag_offset = 0x100, |
Ben Dooks | f705b1a | 2005-06-29 11:09:15 +0100 | [diff] [blame] | 612 | .map_io = bast_map_io, |
| 613 | .init_irq = s3c24xx_init_irq, |
Ben Dooks | 58c8d57 | 2005-10-28 15:31:46 +0100 | [diff] [blame] | 614 | .init_machine = bast_init, |
Stephen Warren | 6bb27d7 | 2012-11-08 12:40:59 -0700 | [diff] [blame] | 615 | .init_time = s3c24xx_timer_init, |
Kukjin Kim | b27b072 | 2012-01-03 14:02:03 +0100 | [diff] [blame] | 616 | .restart = s3c2410_restart, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 617 | MACHINE_END |