tree 22241d3e48d2d765b7f6c92467956e6d0cb1763d
parent b910ecf6bf221bb06f37e44765307c42b20db205
author Liu Dave-r63238 <DaveLiu@freescale.com> 1161160616 +0800
committer Paul Mackerras <paulus@samba.org> 1161748162 +1000

[POWERPC] Fix the UCC rx/tx clock of QE

MPC8323EMDS board ethernet interface with RMII uses the CLK16 divisor
for the rx and tx clock, but the ucc_set_qe_mux_rxtx() function doesn't
handle the CLK16 setting of the CMXUCR3 and CMXUCR4 registers.  This
fixes it.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>