| commit | ee0ebe81004bd0bedf7abe8a2f3eb745da0264dc | [log] [tgz] |
|---|---|---|
| author | Lars-Peter Clausen <lars@metafoo.de> | Thu Nov 27 16:12:18 2014 +0100 |
| committer | Mark Brown <broonie@kernel.org> | Fri Nov 28 11:42:11 2014 +0000 |
| tree | e70b68a84922836fc2154bf4f4703e3e6a5f0c35 | |
| parent | f114040e3ea6e07372334ade75d1ee0775c355e1 [diff] |
spi: cadence: Fix 3-to-8 mux mode In 3-to-8 mux mode for the CS pins we need to set the PERI_SEL bit in the control register. Currently the driver never sets this bit even when configured for 3-to-8 mux mode. This patch adds code which sets the bit during device initialization when necessary. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>