tree 13beaacc71bc6fff526d287ce339fe27a939dd5d
parent cdc3c44cde678a8c5b062492cd7cf09c4e2cc9ce
author Roy ZANG <tie-fei.zang@freescale.com> 1348200772 +0000
committer Kumar Gala <galak@kernel.crashing.org> 1362525027 -0600

powerpc/85xx: Add support for FSL PCIe controller v3.0

The T4240 utilizes a new PCIe controller block that has some minor
programming model differences from previous versions.

The major one that impacts initialization is how we determine the link
state.  On the 3.x controllers we have a memory mapped SoC register
instead of a PCI config register that reports the link state.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>