[PATCH] ppc64: Use num_pmcs in oprofile code
Change oprofile to use num_pmcs from the cpu feature struct.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
diff --git a/arch/ppc64/oprofile/op_model_power4.c b/arch/ppc64/oprofile/op_model_power4.c
index 3d103d6..e469610 100644
--- a/arch/ppc64/oprofile/op_model_power4.c
+++ b/arch/ppc64/oprofile/op_model_power4.c
@@ -23,7 +23,6 @@
static unsigned long reset_value[OP_MAX_COUNTER];
-static int num_counters;
static int oprofile_running;
static int mmcra_has_sihv;
@@ -45,8 +44,6 @@
{
int i;
- num_counters = num_ctrs;
-
/*
* SIHV / SIPR bits are only implemented on POWER4+ (GQ) and above.
* However we disable it on all POWER4 until we verify it works
@@ -68,7 +65,7 @@
backtrace_spinlocks = sys->backtrace_spinlocks;
- for (i = 0; i < num_counters; ++i)
+ for (i = 0; i < cur_cpu_spec->num_pmcs; ++i)
reset_value[i] = 0x80000000UL - ctr[i].count;
/* setup user and kernel profiling */
@@ -121,7 +118,7 @@
/* set the PMM bit (see comment below) */
mtmsrd(mfmsr() | MSR_PMM);
- for (i = 0; i < num_counters; ++i) {
+ for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
if (ctr[i].enabled) {
ctr_write(i, reset_value[i]);
} else {
@@ -272,7 +269,7 @@
/* set the PMM bit (see comment below) */
mtmsrd(mfmsr() | MSR_PMM);
- for (i = 0; i < num_counters; ++i) {
+ for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
val = ctr_read(i);
if (val < 0) {
if (oprofile_running && ctr[i].enabled) {