tree 950f8b4208a76503f3149fc711baedd7b167d068
parent cd6eed3718b1b32c60a6ee5658ae6341de3177d9
author Paul Mackerras <paulus@samba.org> 1191386475 +1000
committer Paul Mackerras <paulus@samba.org> 1191927648 +1000

[POWERPC] Use cache-inhibited large page bit from firmware

Discussions with firmware architects have confirmed that the bit in
the ibm,pa-features property that indicates support for
cache-inhibited large (>= 64kB) page mappings does in fact mean that
the hypervisor allows 64kB mappings to I/O devices.

Thus we can now enable the code that tests that bit and sets our
CPU_FTR_CI_LARGE_PAGE feature bit.

Signed-off-by: Paul Mackerras <paulus@samba.org>