tree b947434ef6edefdbe683b4a6c5740ccec977bc4e
parent af2d940df2b60b15c271033d381c2f3ead655562
author Andy Fleming <afleming@freescale.com> 1184172187 -0500
committer Jeff Garzik <jeff@garzik.org> 1184797777 -0400

Fix RGMII-ID handling in gianfar

The TSEC/eTSEC can detect the interface to the PHY automatically,
but it isn't able to detect whether the RGMII connection needs internal
delay.  So we need to detect that change in the device tree, propagate
it to the platform data, and then check it if we're in RGMII.  This fixes
a bug on the 8641D HPCN board where the Vitesse PHY doesn't use the delay
for RGMII.

Signed-off-by: Andy Fleming <afleming@freescale.com>