commit | 6cd6cede8c33364d8e1abb5ea35adf627e3781b0 | [log] [tgz] |
---|---|---|
author | Peter Ujfalusi <peter.ujfalusi@nokia.com> | Wed Jan 20 09:39:35 2010 +0200 |
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | Wed Jan 20 11:47:49 2010 +0000 |
tree | 17e588f659be6801ef0299a1b7f18019bd6b956e | |
parent | 84740ac19a0aeb87d1dc21e9d7d517f11bd49748 [diff] |
ASoC: tlv320dac33: BCLK divider fix The BCLK divider was not configured in case of mode7. This leads to unpredictable behavior when switching between FIFO modes. Configure the BCLK divider depending on the fifo_mode (FIFO is in use, or FIFO bypass). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>