diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 75bceee9..eba22c2 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -272,6 +272,20 @@
 	  to the kernel, you may specify one here. As a minimum, you should specify
 	  the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
 
+config BOOT_LOAD
+	hex "Kernel load address for booting"
+	default "0x1000"
+	range 0x1000 0x20000000
+	help
+	  This option allows you to set the load address of the kernel.
+	  This can be useful if you are on a board which has a small amount
+	  of memory or you wish to reserve some memory at the beginning of
+	  the address space.
+
+	  Note that you need to keep this value above 4k (0x1000) as this
+	  memory region is used to capture NULL pointer references as well
+	  as some core kernel functions.
+
 comment "Clock/PLL Setup"
 
 config CLKIN_HZ
@@ -303,6 +317,7 @@
 	int "Memory Address Width"
 	depends on BFIN_KERNEL_CLOCK
 	depends on (!BF54x)
+	range 8 11
 	default  9 if BFIN533_EZKIT
 	default  9 if BFIN561_EZKIT
 	default  9 if H8606_HVSISTEMAS
@@ -365,14 +380,7 @@
 	int "System Clock Divider"
 	depends on BFIN_KERNEL_CLOCK
 	range 1 15
-	default 5 if BFIN533_EZKIT
-	default 5 if BFIN533_STAMP
-	default 4 if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM)
-	default 5 if BFIN533_BLUETECHNIX_CM
-	default 4 if BFIN537_BLUETECHNIX_CM
-	default 4 if BFIN561_BLUETECHNIX_CM
-	default 5 if BFIN561_EZKIT
-	default 3 if H8606_HVSISTEMAS
+	default 5
 	help
 	  This sets the frequency of the system clock (including SDRAM or DDR).
 	  This can be between 1 and 15
@@ -386,6 +394,19 @@
 	  This is the max memory size that the kernel will create CPLB
 	  tables for.  Your system will not be able to handle any more.
 
+choice
+	prompt "DDR SDRAM Chip Type"
+	depends on BFIN_KERNEL_CLOCK
+	depends on BF54x
+	default MEM_MT46V32M16_5B
+
+config MEM_MT46V32M16_6T
+	bool "MT46V32M16_6T"
+
+config MEM_MT46V32M16_5B
+	bool "MT46V32M16_5B"
+endchoice
+
 #
 # Max & Min Speeds for various Chips
 #
@@ -454,17 +475,7 @@
 
 comment "Memory Setup"
 
-choice
-	prompt "DDR SDRAM Chip Type"
-	depends on (BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM)
-	default MEM_MT46V32M16_5B
-
-config MEM_MT46V32M16_6T
-        bool "MT46V32M16_6T"
-
-config MEM_MT46V32M16_5B
-        bool "MT46V32M16_5B"
-endchoice
+comment "Misc"
 
 config ENET_FLASH_PIN
 	int "PF port/pin used for flash and ethernet sharing"
@@ -476,20 +487,6 @@
 	  code.
 	  For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
 
-config BOOT_LOAD
-	hex "Kernel load address for booting"
-	default "0x1000"
-	range 0x1000 0x20000000
-	help
-	  This option allows you to set the load address of the kernel.
-	  This can be useful if you are on a board which has a small amount
-	  of memory or you wish to reserve some memory at the beginning of
-	  the address space.
-
-	  Note that you need to keep this value above 4k (0x1000) as this
-	  memory region is used to capture NULL pointer references as well
-	  as some core kernel functions.
-
 choice
 	prompt "Blackfin Exception Scratch Register"
 	default BFIN_SCRATCH_REG_RETN