Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 5033/1: Unbreak corgi_ssp by registering ssp drivers earlier.
[ARM] Orion: clean up addr-map.c after window setting code purge
[ARM] Orion: pass proper t_clk into mv643xx_eth
[ARM] Orion: use mv643xx_eth driver mbus window handling
[ARM] pxa: Fix RCSR handling
[ARM] lubbock: fix compilation
[ARM] 5032/1: Added cpufreq support for pxa27x CPU
[ARM] 5031/1: Indentation correction in cpu-pxa.c.
[ARM] 5028/1: pxafb: fix broken "backward compatibility way" in framebuffer
[ARM] 4882/2: Correction for S3C2410 clkout generation
[ARM] 5027/1: Fixed random memory corruption on pxa suspend cycle.
[ARM] 5024/1: Fix some minor clk issues in the MMCI PL18x driver
[ARM] 5023/1: Fix broken gpio interrupts on ep93xx
ns9xxx: fix sparse warning
ns9xxx: check for irq lockups
ns9xxx: fix handle_prio_irq to unmask irqs with lower priority
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 795d0ac..fd57085 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -832,6 +832,7 @@
config BANK_1
hex "Bank 1"
default 0x7BB0
+ default 0x5558 if BF54x
config BANK_2
hex "Bank 2"
@@ -963,21 +964,22 @@
endmenu
-if (BF537 || BF533 || BF54x)
-
menu "CPU Frequency scaling"
source "drivers/cpufreq/Kconfig"
-config CPU_FREQ
- bool
+config CPU_VOLTAGE
+ bool "CPU Voltage scaling"
+ depends on EXPERIMENTAL
+ depends on CPU_FREQ
default n
help
- If you want to enable this option, you should select the
- DPMC driver from Character Devices.
-endmenu
+ Say Y here if you want CPU voltage scaling according to the CPU frequency.
+ This option violates the PLL BYPASS recommendation in the Blackfin Processor
+ manuals. There is a theoretical risk that during VDDINT transitions
+ the PLL may unlock.
-endif
+endmenu
source "net/Kconfig"
diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c
index 721f15f..881afe9 100644
--- a/arch/blackfin/kernel/asm-offsets.c
+++ b/arch/blackfin/kernel/asm-offsets.c
@@ -56,9 +56,6 @@
/* offsets into the thread struct */
DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
- DEFINE(THREAD_SR, offsetof(struct thread_struct, seqstat));
- DEFINE(PT_SR, offsetof(struct thread_struct, seqstat));
- DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
DEFINE(THREAD_PC, offsetof(struct thread_struct, pc));
DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE);
diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S
index 5ed47228..4b03ba0 100644
--- a/arch/blackfin/kernel/fixed_code.S
+++ b/arch/blackfin/kernel/fixed_code.S
@@ -1,6 +1,6 @@
/*
* This file contains sequences of code that will be copied to a
- * fixed location, defined in <asm/atomic_seq.h>. The interrupt
+ * fixed location, defined in <asm/fixed_code.h>. The interrupt
* handlers ensure that these sequences appear to be atomic when
* executed from userspace.
* These are aligned to 16 bytes, so that we have some space to replace
diff --git a/arch/blackfin/kernel/module.c b/arch/blackfin/kernel/module.c
index 8b9fe29..14a4284 100644
--- a/arch/blackfin/kernel/module.c
+++ b/arch/blackfin/kernel/module.c
@@ -160,6 +160,13 @@
module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
char *secstrings, struct module *mod)
{
+ /*
+ * XXX: sechdrs are vmalloced in kernel/module.c
+ * and would be vfreed just after module is loaded,
+ * so we hack to keep the only information we needed
+ * in mod->arch to correctly free L1 I/D sram later.
+ * NOTE: this breaks the semantic of mod->arch structure.
+ */
Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
void *dest = NULL;
@@ -167,8 +174,8 @@
if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) ||
((strcmp(".text", secstrings + s->sh_name) == 0) &&
(hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) {
- mod->arch.text_l1 = s;
dest = l1_inst_sram_alloc(s->sh_size);
+ mod->arch.text_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 instruction memory allocation failed\n",
@@ -182,8 +189,8 @@
if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) ||
((strcmp(".data", secstrings + s->sh_name) == 0) &&
(hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
- mod->arch.data_a_l1 = s;
dest = l1_data_sram_alloc(s->sh_size);
+ mod->arch.data_a_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 data memory allocation failed\n",
@@ -197,8 +204,8 @@
if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 ||
((strcmp(".bss", secstrings + s->sh_name) == 0) &&
(hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
- mod->arch.bss_a_l1 = s;
dest = l1_data_sram_alloc(s->sh_size);
+ mod->arch.bss_a_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 data memory allocation failed\n",
@@ -210,8 +217,8 @@
s->sh_addr = (unsigned long)dest;
}
if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) {
- mod->arch.data_b_l1 = s;
dest = l1_data_B_sram_alloc(s->sh_size);
+ mod->arch.data_b_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 data memory allocation failed\n",
@@ -223,8 +230,8 @@
s->sh_addr = (unsigned long)dest;
}
if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) {
- mod->arch.bss_b_l1 = s;
dest = l1_data_B_sram_alloc(s->sh_size);
+ mod->arch.bss_b_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 data memory allocation failed\n",
@@ -416,14 +423,14 @@
void module_arch_cleanup(struct module *mod)
{
- if ((mod->arch.text_l1) && (mod->arch.text_l1->sh_addr))
- l1_inst_sram_free((void *)mod->arch.text_l1->sh_addr);
- if ((mod->arch.data_a_l1) && (mod->arch.data_a_l1->sh_addr))
- l1_data_sram_free((void *)mod->arch.data_a_l1->sh_addr);
- if ((mod->arch.bss_a_l1) && (mod->arch.bss_a_l1->sh_addr))
- l1_data_sram_free((void *)mod->arch.bss_a_l1->sh_addr);
- if ((mod->arch.data_b_l1) && (mod->arch.data_b_l1->sh_addr))
- l1_data_B_sram_free((void *)mod->arch.data_b_l1->sh_addr);
- if ((mod->arch.bss_b_l1) && (mod->arch.bss_b_l1->sh_addr))
- l1_data_B_sram_free((void *)mod->arch.bss_b_l1->sh_addr);
+ if (mod->arch.text_l1)
+ l1_inst_sram_free((void *)mod->arch.text_l1);
+ if (mod->arch.data_a_l1)
+ l1_data_sram_free((void *)mod->arch.data_a_l1);
+ if (mod->arch.bss_a_l1)
+ l1_data_sram_free((void *)mod->arch.bss_a_l1);
+ if (mod->arch.data_b_l1)
+ l1_data_B_sram_free((void *)mod->arch.data_b_l1);
+ if (mod->arch.bss_b_l1)
+ l1_data_B_sram_free((void *)mod->arch.bss_b_l1);
}
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index be9fdd0..53c2cd25 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -245,7 +245,7 @@
void finish_atomic_sections (struct pt_regs *regs)
{
- int __user *up0 = (int __user *)®s->p0;
+ int __user *up0 = (int __user *)regs->p0;
if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END)
return;
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index b4f062c..f51ab08 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -185,8 +185,8 @@
{
unsigned long tmp;
/* make sure the single step bit is not set. */
- tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
- put_reg(child, PT_SR, tmp);
+ tmp = get_reg(child, PT_SYSCFG) & ~TRACE_BITS;
+ put_reg(child, PT_SYSCFG, tmp);
}
long arch_ptrace(struct task_struct *child, long request, long addr, long data)
diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c
index cb9d883..dbc3bbf 100644
--- a/arch/blackfin/kernel/signal.c
+++ b/arch/blackfin/kernel/signal.c
@@ -42,6 +42,9 @@
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+/* Location of the trace bit in SYSCFG. */
+#define TRACE_BITS 0x0001
+
struct fdpic_func_descriptor {
unsigned long text;
unsigned long GOT;
@@ -225,6 +228,16 @@
regs->r1 = (unsigned long)(&frame->info);
regs->r2 = (unsigned long)(&frame->uc);
+ /*
+ * Clear the trace flag when entering the signal handler, but
+ * notify any tracer that was single-stepping it. The tracer
+ * may want to single-step inside the handler too.
+ */
+ if (regs->syscfg & TRACE_BITS) {
+ regs->syscfg &= ~TRACE_BITS;
+ ptrace_notify(SIGTRAP);
+ }
+
return 0;
give_sigsegv:
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index 4482c47..e887efc 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -60,7 +60,7 @@
static cycle_t read_cycles(void)
{
- return get_cycles();
+ return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod);
}
unsigned long long sched_clock(void)
@@ -117,7 +117,7 @@
break;
}
case CLOCK_EVT_MODE_ONESHOT:
- bfin_write_TSCALE(0);
+ bfin_write_TSCALE(TIME_SCALE - 1);
bfin_write_TCOUNT(0);
bfin_write_TCNTL(TMPWR | TMREN);
CSYNC();
@@ -183,10 +183,14 @@
static int __init bfin_clockevent_init(void)
{
+ unsigned long timer_clk;
+
+ timer_clk = get_cclk() / TIME_SCALE;
+
setup_irq(IRQ_CORETMR, &bfin_timer_irq);
bfin_timer_init();
- clockevent_bfin.mult = div_sc(get_cclk(), NSEC_PER_SEC, clockevent_bfin.shift);
+ clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
clockevents_register_device(&clockevent_bfin);
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 583d538..8aa49f8 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -32,12 +32,14 @@
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/ata_platform.h>
+#include <linux/i2c.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/usb/sl811.h>
@@ -50,6 +52,7 @@
#include <asm/reboot.h>
#include <asm/nand.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
#include <linux/spi/ad7877.h>
/*
@@ -171,6 +174,46 @@
};
#endif
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct mtd_partition ezkit_partitions[] = {
+ {
+ .name = "Bootloader",
+ .size = 0x40000,
+ .offset = 0,
+ }, {
+ .name = "Kernel",
+ .size = 0x1C0000,
+ .offset = MTDPART_OFS_APPEND,
+ }, {
+ .name = "RootFS",
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND,
+ }
+};
+
+static struct physmap_flash_data ezkit_flash_data = {
+ .width = 2,
+ .parts = ezkit_partitions,
+ .nr_parts = ARRAY_SIZE(ezkit_partitions),
+};
+
+static struct resource ezkit_flash_resource = {
+ .start = 0x20000000,
+ .end = 0x203fffff,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device ezkit_flash_device = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &ezkit_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &ezkit_flash_resource,
+};
+#endif
+
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
static struct mtd_partition partition_info[] = {
{
@@ -420,11 +463,7 @@
.offset = 0,
.mask_flags = MTD_CAP_ROM
}, {
- .name = "kernel",
- .size = 0xe0000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "file system",
+ .name = "linux kernel",
.size = MTDPART_SIZ_FULL,
.offset = MTDPART_OFS_APPEND,
}
@@ -434,7 +473,7 @@
.name = "m25p80",
.parts = bfin_spi_flash_partitions,
.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
- .type = "m25p64",
+ .type = "m25p16",
};
/* SPI flash chip (m25p64) */
@@ -755,6 +794,24 @@
};
#endif
+#ifdef CONFIG_I2C_BOARDINFO
+static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
+#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
+ {
+ I2C_BOARD_INFO("pcf8574_lcd", 0x22),
+ .type = "pcf8574_lcd",
+ },
+#endif
+#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
+ {
+ I2C_BOARD_INFO("pcf8574_keypad", 0x27),
+ .type = "pcf8574_keypad",
+ .irq = IRQ_PF8,
+ },
+#endif
+};
+#endif
+
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
.name = "bfin-sport-uart",
@@ -839,7 +896,32 @@
.resource = &bfin_gpios_resources,
};
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_100, 400000000),
+ VRPAIR(VLEV_105, 426000000),
+ VRPAIR(VLEV_110, 500000000),
+ VRPAIR(VLEV_115, 533000000),
+ VRPAIR(VLEV_120, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *stamp_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
&bf5xx_nand_device,
#endif
@@ -921,12 +1003,22 @@
&bfin_device_gpiokeys,
#endif
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+ &ezkit_flash_device,
+#endif
+
&bfin_gpios_device,
};
static int __init stamp_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
+
+#ifdef CONFIG_I2C_BOARDINFO
+ i2c_register_board_info(0, bfin_i2c_board_info,
+ ARRAY_SIZE(bfin_i2c_board_info));
+#endif
+
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
spi_register_board_info(bfin_spi_board_info,
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index a03149c..ed2b0b8 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -33,12 +33,15 @@
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
+#endif
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -341,7 +344,37 @@
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 376000000),
+ VRPAIR(VLEV_095, 426000000),
+ VRPAIR(VLEV_100, 426000000),
+ VRPAIR(VLEV_105, 476000000),
+ VRPAIR(VLEV_110, 476000000),
+ VRPAIR(VLEV_115, 476000000),
+ VRPAIR(VLEV_120, 600000000),
+ VRPAIR(VLEV_125, 600000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *cm_bf533_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
&bfin_uart_device,
#endif
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index 08a7943..9d28415 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -42,6 +42,7 @@
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -350,7 +351,37 @@
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 376000000),
+ VRPAIR(VLEV_095, 426000000),
+ VRPAIR(VLEV_100, 426000000),
+ VRPAIR(VLEV_105, 476000000),
+ VRPAIR(VLEV_110, 476000000),
+ VRPAIR(VLEV_115, 476000000),
+ VRPAIR(VLEV_120, 600000000),
+ VRPAIR(VLEV_125, 600000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *ezkit_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
&smc91x_device,
#endif
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 024f418..7fd35fb 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -45,6 +45,7 @@
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -516,7 +517,37 @@
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 376000000),
+ VRPAIR(VLEV_095, 426000000),
+ VRPAIR(VLEV_100, 426000000),
+ VRPAIR(VLEV_105, 476000000),
+ VRPAIR(VLEV_110, 476000000),
+ VRPAIR(VLEV_115, 476000000),
+ VRPAIR(VLEV_120, 600000000),
+ VRPAIR(VLEV_125, 600000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *stamp_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
&rtc_device,
#endif
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index d8a23cd..73f2142 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -35,12 +35,15 @@
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
+#endif
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -428,7 +431,37 @@
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 376000000),
+ VRPAIR(VLEV_095, 426000000),
+ VRPAIR(VLEV_100, 426000000),
+ VRPAIR(VLEV_105, 476000000),
+ VRPAIR(VLEV_110, 476000000),
+ VRPAIR(VLEV_115, 476000000),
+ VRPAIR(VLEV_120, 500000000),
+ VRPAIR(VLEV_125, 533000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *cm_bf537_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
&hitachi_fb_device,
#endif
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index d3727b7..9a756d1 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -47,6 +47,7 @@
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
#include <linux/spi/ad7877.h>
/*
@@ -817,7 +818,37 @@
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 376000000),
+ VRPAIR(VLEV_095, 426000000),
+ VRPAIR(VLEV_100, 426000000),
+ VRPAIR(VLEV_105, 476000000),
+ VRPAIR(VLEV_110, 476000000),
+ VRPAIR(VLEV_115, 476000000),
+ VRPAIR(VLEV_120, 500000000),
+ VRPAIR(VLEV_125, 533000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *stamp_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
&bfin_pcmcia_cf_device,
#endif
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index e3e8479..3b74f96 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -36,7 +36,9 @@
#include <linux/spi/flash.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
+#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
#include <linux/usb/musb.h>
+#endif
#include <asm/bfin5xx_spi.h>
#include <asm/cplb.h>
#include <asm/dma.h>
@@ -44,6 +46,7 @@
#include <asm/nand.h>
#include <asm/portmux.h>
#include <asm/mach/bf54x_keys.h>
+#include <asm/dpmc.h>
#include <linux/input.h>
#include <linux/spi/ad7877.h>
@@ -590,7 +593,38 @@
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+/*
+ * Internal VLEV BF54XSBBC1533
+ ****temporarily using these values until data sheet is updated
+ */
+ VRPAIR(VLEV_085, 150000000),
+ VRPAIR(VLEV_090, 250000000),
+ VRPAIR(VLEV_110, 276000000),
+ VRPAIR(VLEV_115, 301000000),
+ VRPAIR(VLEV_120, 525000000),
+ VRPAIR(VLEV_125, 550000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *cm_bf548_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
&rtc_device,
#endif
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index b00f68a..d1682bb 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -46,6 +46,7 @@
#include <asm/dma.h>
#include <asm/gpio.h>
#include <asm/nand.h>
+#include <asm/dpmc.h>
#include <asm/portmux.h>
#include <asm/mach/bf54x_keys.h>
#include <linux/input.h>
@@ -689,7 +690,38 @@
.resource = &bfin_gpios_resources,
};
+static const unsigned int cclk_vlev_datasheet[] =
+{
+/*
+ * Internal VLEV BF54XSBBC1533
+ ****temporarily using these values until data sheet is updated
+ */
+ VRPAIR(VLEV_085, 150000000),
+ VRPAIR(VLEV_090, 250000000),
+ VRPAIR(VLEV_110, 276000000),
+ VRPAIR(VLEV_115, 301000000),
+ VRPAIR(VLEV_120, 525000000),
+ VRPAIR(VLEV_125, 550000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *ezkit_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
&rtc_device,
#endif
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 9fd5809..466ef59 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -33,12 +33,15 @@
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
+#endif
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -339,8 +342,37 @@
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 300000000),
+ VRPAIR(VLEV_095, 313000000),
+ VRPAIR(VLEV_100, 350000000),
+ VRPAIR(VLEV_105, 400000000),
+ VRPAIR(VLEV_110, 444000000),
+ VRPAIR(VLEV_115, 450000000),
+ VRPAIR(VLEV_120, 475000000),
+ VRPAIR(VLEV_125, 500000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *cm_bf561_devices[] __initdata = {
+ &bfin_dpmc,
+
#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
&hitachi_fb_device,
#endif
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 0d74b7d..61d8f76 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -39,6 +39,7 @@
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
+#include <asm/dpmc.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -443,7 +444,37 @@
};
#endif
+static const unsigned int cclk_vlev_datasheet[] =
+{
+ VRPAIR(VLEV_085, 250000000),
+ VRPAIR(VLEV_090, 300000000),
+ VRPAIR(VLEV_095, 313000000),
+ VRPAIR(VLEV_100, 350000000),
+ VRPAIR(VLEV_105, 400000000),
+ VRPAIR(VLEV_110, 444000000),
+ VRPAIR(VLEV_115, 450000000),
+ VRPAIR(VLEV_120, 475000000),
+ VRPAIR(VLEV_125, 500000000),
+ VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+ .tuple_tab = cclk_vlev_datasheet,
+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+ .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+ .name = "bfin dpmc",
+ .dev = {
+ .platform_data = &bfin_dmpc_vreg_data,
+ },
+};
+
static struct platform_device *ezkit_devices[] __initdata = {
+
+ &bfin_dpmc,
+
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
&smc91x_device,
#endif
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile
index 393081e..422bfee 100644
--- a/arch/blackfin/mach-common/Makefile
+++ b/arch/blackfin/mach-common/Makefile
@@ -6,5 +6,6 @@
cache.o cacheinit.o entry.o \
interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o
-obj-$(CONFIG_PM) += pm.o dpmc.o
-obj-$(CONFIG_CPU_FREQ) += cpufreq.o
+obj-$(CONFIG_PM) += pm.o dpmc_modes.o
+obj-$(CONFIG_CPU_FREQ) += cpufreq.o
+obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index ed81e00..75cdad2 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -62,6 +62,14 @@
unsigned int tscale; /* change the divider on the core timer interrupt */
} dpm_state_table[3];
+/*
+ normalized to maximum frequncy offset for CYCLES,
+ used in time-ts cycles clock source, but could be used
+ somewhere also.
+ */
+unsigned long long __bfin_cycles_off;
+unsigned int __bfin_cycles_mod;
+
/**************************************************************************/
static unsigned int bfin_getfreq(unsigned int cpu)
@@ -80,6 +88,7 @@
unsigned int index, plldiv, tscale;
unsigned long flags, cclk_hz;
struct cpufreq_freqs freqs;
+ cycles_t cycles;
if (cpufreq_frequency_table_target(policy, bfin_freq_table,
target_freq, relation, &index))
@@ -101,8 +110,14 @@
bfin_write_PLL_DIV(plldiv);
/* we have to adjust the core timer, because it is using cclk */
bfin_write_TSCALE(tscale);
+ cycles = get_cycles();
SSYNC();
+ cycles += 10; /* ~10 cycles we loose after get_cycles() */
+ __bfin_cycles_off += (cycles << __bfin_cycles_mod) - (cycles << index);
+ __bfin_cycles_mod = index;
local_irq_restore(flags);
+ /* TODO: just test case for cycles clock source, remove later */
+ pr_debug("cpufreq: done\n");
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
return 0;
@@ -119,22 +134,13 @@
unsigned long cclk, sclk, csel, min_cclk;
int index;
-#ifdef CONFIG_CYCLES_CLOCKSOURCE
-/*
- * Clocksource CYCLES is still CONTINUOUS but not longer MONOTONIC in case we enable
- * CPU frequency scaling, since CYCLES runs off Core Clock.
- */
- printk(KERN_WARNING "CPU frequency scaling not supported: Clocksource not suitable\n"
- return -ENODEV;
-#endif
-
if (policy->cpu != 0)
return -EINVAL;
cclk = get_cclk();
sclk = get_sclk();
-#if ANOMALY_05000273
+#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
min_cclk = sclk * 2;
#else
min_cclk = sclk;
diff --git a/arch/blackfin/mach-common/dpmc.c b/arch/blackfin/mach-common/dpmc.c
new file mode 100644
index 0000000..02c7efd
--- /dev/null
+++ b/arch/blackfin/mach-common/dpmc.c
@@ -0,0 +1,137 @@
+/*
+ * Copyright 2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/cdev.h>
+#include <linux/device.h>
+#include <linux/errno.h>
+#include <linux/fs.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+#include <linux/cpufreq.h>
+
+#include <asm/delay.h>
+#include <asm/dpmc.h>
+
+#define DRIVER_NAME "bfin dpmc"
+
+#define dprintk(msg...) \
+ cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, DRIVER_NAME, msg)
+
+struct bfin_dpmc_platform_data *pdata;
+
+/**
+ * bfin_set_vlev - Update VLEV field in VR_CTL Reg.
+ * Avoid BYPASS sequence
+ */
+static void bfin_set_vlev(unsigned int vlev)
+{
+ unsigned pll_lcnt;
+
+ pll_lcnt = bfin_read_PLL_LOCKCNT();
+
+ bfin_write_PLL_LOCKCNT(1);
+ bfin_write_VR_CTL((bfin_read_VR_CTL() & ~VLEV) | vlev);
+ bfin_write_PLL_LOCKCNT(pll_lcnt);
+}
+
+/**
+ * bfin_get_vlev - Get CPU specific VLEV from platform device data
+ */
+static unsigned int bfin_get_vlev(unsigned int freq)
+{
+ int i;
+
+ if (!pdata)
+ goto err_out;
+
+ freq >>= 16;
+
+ for (i = 0; i < pdata->tabsize; i++)
+ if (freq <= (pdata->tuple_tab[i] & 0xFFFF))
+ return pdata->tuple_tab[i] >> 16;
+
+err_out:
+ printk(KERN_WARNING "DPMC: No suitable CCLK VDDINT voltage pair found\n");
+ return VLEV_120;
+}
+
+#ifdef CONFIG_CPU_FREQ
+static int
+vreg_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
+{
+ struct cpufreq_freqs *freq = data;
+
+ if (val == CPUFREQ_PRECHANGE && freq->old < freq->new) {
+ bfin_set_vlev(bfin_get_vlev(freq->new));
+ udelay(pdata->vr_settling_time); /* Wait until Volatge settled */
+
+ } else if (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)
+ bfin_set_vlev(bfin_get_vlev(freq->new));
+
+ return 0;
+}
+
+static struct notifier_block vreg_cpufreq_notifier_block = {
+ .notifier_call = vreg_cpufreq_notifier
+};
+#endif /* CONFIG_CPU_FREQ */
+
+/**
+ * bfin_dpmc_probe -
+ *
+ */
+static int __devinit bfin_dpmc_probe(struct platform_device *pdev)
+{
+ if (pdev->dev.platform_data)
+ pdata = pdev->dev.platform_data;
+ else
+ return -EINVAL;
+
+ return cpufreq_register_notifier(&vreg_cpufreq_notifier_block,
+ CPUFREQ_TRANSITION_NOTIFIER);
+}
+
+/**
+ * bfin_dpmc_remove -
+ */
+static int __devexit bfin_dpmc_remove(struct platform_device *pdev)
+{
+ pdata = NULL;
+ return cpufreq_unregister_notifier(&vreg_cpufreq_notifier_block,
+ CPUFREQ_TRANSITION_NOTIFIER);
+}
+
+struct platform_driver bfin_dpmc_device_driver = {
+ .probe = bfin_dpmc_probe,
+ .remove = __devexit_p(bfin_dpmc_remove),
+ .driver = {
+ .name = DRIVER_NAME,
+ }
+};
+
+/**
+ * bfin_dpmc_init - Init driver
+ */
+static int __init bfin_dpmc_init(void)
+{
+ return platform_driver_register(&bfin_dpmc_device_driver);
+}
+module_init(bfin_dpmc_init);
+
+/**
+ * bfin_dpmc_exit - break down driver
+ */
+static void __exit bfin_dpmc_exit(void)
+{
+ platform_driver_unregister(&bfin_dpmc_device_driver);
+}
+module_exit(bfin_dpmc_exit);
+
+MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
+MODULE_DESCRIPTION("cpu power management driver for Blackfin");
+MODULE_LICENSE("GPL");
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc_modes.S
similarity index 82%
rename from arch/blackfin/mach-common/dpmc.S
rename to arch/blackfin/mach-common/dpmc_modes.S
index 9d45aa3..b7981d3 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -1,30 +1,7 @@
/*
- * File: arch/blackfin/mach-common/dpmc.S
- * Based on:
- * Author: LG Soft India
+ * Copyright 2004-2008 Analog Devices Inc.
*
- * Created: ?
- * Description: Watchdog Timer APIs
- *
- * Modified:
- * Copyright 2004-2006 Analog Devices Inc.
- *
- * Bugs: Enter bugs at http://blackfin.uclinux.org/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ * Licensed under the GPL-2 or later.
*/
#include <linux/linkage.h>
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index f2fb87e..038f70e 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -151,26 +151,62 @@
ENDPROC(_ex_soft_bp)
ENTRY(_ex_single_step)
+ /* If we just returned from an interrupt, the single step event is
+ for the RTI instruction. */
r7 = retx;
r6 = reti;
cc = r7 == r6;
- if cc jump _bfin_return_from_exception
+ if cc jump _bfin_return_from_exception;
+
+ /* If we were in user mode, do the single step normally. */
+ p5.l = lo(IPEND);
+ p5.h = hi(IPEND);
+ r6 = [p5];
+ r7 = 0xffe0 (z);
+ r7 = r7 & r6;
+ cc = r7 == 0;
+ if !cc jump 1f;
+
+ /* Single stepping only a single instruction, so clear the trace
+ * bit here. */
+ r7 = syscfg;
+ bitclr (r7, 0);
+ syscfg = R7;
+ jump _ex_trap_c;
+
+1:
+ /*
+ * We were in an interrupt handler. By convention, all of them save
+ * SYSCFG with their first instruction, so by checking whether our
+ * RETX points at the entry point, we can determine whether to allow
+ * a single step, or whether to clear SYSCFG.
+ *
+ * First, find out the interrupt level and the event vector for it.
+ */
+ p5.l = lo(EVT0);
+ p5.h = hi(EVT0);
+ p5 += -4;
+2:
+ r7 = rot r7 by -1;
+ p5 += 4;
+ if !cc jump 2b;
+
+ /* What we actually do is test for the _second_ instruction in the
+ * IRQ handler. That way, if there are insns following the restore
+ * of SYSCFG after leaving the handler, we will not turn off SYSCFG
+ * for them. */
+
+ r7 = [p5];
+ r7 += 2;
+ r6 = RETX;
+ cc = R7 == R6;
+ if !cc jump _bfin_return_from_exception;
+
r7 = syscfg;
bitclr (r7, 0);
syscfg = R7;
- p5.l = lo(IPEND);
- p5.h = hi(IPEND);
- r6 = [p5];
- cc = bittst(r6, 5);
- if !cc jump _ex_trap_c;
- p4.l = lo(EVT5);
- p4.h = hi(EVT5);
- r6.h = _exception_to_level5;
- r6.l = _exception_to_level5;
- r7 = [p4];
- cc = r6 == r7;
- if !cc jump _ex_trap_c;
+ /* Fall through to _bfin_return_from_exception. */
ENDPROC(_ex_single_step)
ENTRY(_bfin_return_from_exception)
@@ -234,20 +270,26 @@
p5.l = _saved_icplb_fault_addr;
[p5] = r7;
- p4.l = __retx;
- p4.h = __retx;
+ p4.l = _excpt_saved_stuff;
+ p4.h = _excpt_saved_stuff;
+
r6 = retx;
[p4] = r6;
- p4.l = lo(SAFE_USER_INSTRUCTION);
- p4.h = hi(SAFE_USER_INSTRUCTION);
- retx = p4;
+
+ r6 = SYSCFG;
+ [p4 + 4] = r6;
+ BITCLR(r6, 0);
+ SYSCFG = r6;
/* Disable all interrupts, but make sure level 5 is enabled so
* we can switch to that level. Save the old mask. */
cli r6;
- p4.l = _excpt_saved_imask;
- p4.h = _excpt_saved_imask;
- [p4] = r6;
+ [p4 + 8] = r6;
+
+ p4.l = lo(SAFE_USER_INSTRUCTION);
+ p4.h = hi(SAFE_USER_INSTRUCTION);
+ retx = p4;
+
r6 = 0x3f;
sti r6;
@@ -295,6 +337,11 @@
*/
SAVE_ALL_SYS
+ /* The dumping functions expect the return address in the RETI
+ * slot. */
+ r6 = retx;
+ [sp + PT_PC] = r6;
+
r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
SP += -12;
call _double_fault_c;
@@ -307,16 +354,17 @@
ENTRY(_exception_to_level5)
SAVE_ALL_SYS
- p4.l = __retx;
- p4.h = __retx;
+ p4.l = _excpt_saved_stuff;
+ p4.h = _excpt_saved_stuff;
r6 = [p4];
[sp + PT_PC] = r6;
+ r6 = [p4 + 4];
+ [sp + PT_SYSCFG] = r6;
+
/* Restore interrupt mask. We haven't pushed RETI, so this
* doesn't enable interrupts until we return from this handler. */
- p4.l = _excpt_saved_imask;
- p4.h = _excpt_saved_imask;
- r6 = [p4];
+ r6 = [p4 + 8];
sti r6;
/* Restore the hardware error vector. */
@@ -1344,7 +1392,14 @@
.rept NR_syscalls-(.-_sys_call_table)/4
.long _sys_ni_syscall
.endr
-_excpt_saved_imask:
+
+ /*
+ * Used to save the real RETX, IMASK and SYSCFG when temporarily
+ * storing safe values across the transition from exception to IRQ5.
+ */
+_excpt_saved_stuff:
+ .long 0;
+ .long 0;
.long 0;
_exception_stack:
@@ -1358,7 +1413,3 @@
_last_cplb_fault_retx:
.long 0;
#endif
- /* Used to save the real RETX when temporarily storing a safe
- * return address. */
-__retx:
- .long 0;
diff --git a/arch/cris/kernel/sys_cris.c b/arch/cris/kernel/sys_cris.c
index d124066..a79fbd8 100644
--- a/arch/cris/kernel/sys_cris.c
+++ b/arch/cris/kernel/sys_cris.c
@@ -27,28 +27,6 @@
#include <asm/uaccess.h>
#include <asm/segment.h>
-/*
- * sys_pipe() is the normal C calling standard for creating
- * a pipe. It's not the way Unix traditionally does this, though.
- */
-asmlinkage int sys_pipe(unsigned long __user * fildes)
-{
- int fd[2];
- int error;
-
- lock_kernel();
- error = do_pipe(fd);
- unlock_kernel();
- if (!error) {
- if (copy_to_user(fildes, fd, 2*sizeof(int))) {
- sys_close(fd[0]);
- sys_close(fd[1]);
- error = -EFAULT;
- }
- }
- return error;
-}
-
/* common code for old and new mmaps */
static inline long
do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
diff --git a/arch/m32r/kernel/sys_m32r.c b/arch/m32r/kernel/sys_m32r.c
index 319c797..305ac85 100644
--- a/arch/m32r/kernel/sys_m32r.c
+++ b/arch/m32r/kernel/sys_m32r.c
@@ -76,29 +76,6 @@
return oldval;
}
-/*
- * sys_pipe() is the normal C calling standard for creating
- * a pipe. It's not the way Unix traditionally does this, though.
- */
-asmlinkage int
-sys_pipe(unsigned long r0, unsigned long r1, unsigned long r2,
- unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, struct pt_regs regs)
-{
- int fd[2];
- int error;
-
- error = do_pipe(fd);
- if (!error) {
- if (copy_to_user((void __user *)r0, fd, 2*sizeof(int))) {
- sys_close(fd[0]);
- sys_close(fd[1]);
- error = -EFAULT;
- }
- }
- return error;
-}
-
asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
unsigned long prot, unsigned long flags,
unsigned long fd, unsigned long pgoff)
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 6a6409a..e856218 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -186,17 +186,6 @@
Say Y here if you are building a kernel for a desktop, embedded
or real-time system. Say N if you are unsure.
-config PREEMPT_BKL
- bool "Preempt The Big Kernel Lock"
- depends on PREEMPT
- default y
- help
- This option reduces the latency of the kernel by making the
- big kernel lock preemptible.
-
- Say Y here if you are building a kernel for a desktop system.
- Say N if you are unsure.
-
config MN10300_CURRENT_IN_E2
bool "Hold current task address in E2 register"
default y
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index a1ae4d6..72d6756 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -342,9 +342,14 @@
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
+ * From the 440EPx user manual:
+ * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB
+ * I/O 1 E800 0000 1 E800 FFFF 64KB
+ * I/O 1 E880 0000 1 EBFF FFFF 56MB
*/
- ranges = <02000000 0 80000000 1 80000000 0 10000000
- 01000000 0 00000000 1 e8000000 0 00100000>;
+ ranges = <02000000 0 80000000 1 80000000 0 40000000
+ 01000000 0 00000000 1 e8000000 0 00010000
+ 01000000 0 00000000 1 e8800000 0 03800000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <42000000 0 0 0 0 0 80000000>;
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index 9f93777..d8f0329 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -16,7 +16,6 @@
#include <asm/mmu.h>
#include <asm/pgtable.h>
#include <asm/io.h>
-#include <asm/prom.h>
#include <asm/processor.h>
#include <asm/udbg.h>
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 36080d4..81738a4 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1208,6 +1208,18 @@
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
+ { /* default match */
+ .pvr_mask = 0x00000000,
+ .pvr_value = 0x00000000,
+ .cpu_name = "(generic 40x PPC)",
+ .cpu_features = CPU_FTRS_40X,
+ .cpu_user_features = PPC_FEATURE_32 |
+ PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .machine_check = machine_check_4xx,
+ .platform = "ppc405",
+ }
#endif /* CONFIG_40x */
#ifdef CONFIG_44x
@@ -1421,8 +1433,18 @@
.machine_check = machine_check_440A,
.platform = "ppc440",
},
+ { /* default match */
+ .pvr_mask = 0x00000000,
+ .pvr_value = 0x00000000,
+ .cpu_name = "(generic 44x PPC)",
+ .cpu_features = CPU_FTRS_44X,
+ .cpu_user_features = COMMON_USER_BOOKE,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .machine_check = machine_check_4xx,
+ .platform = "ppc440",
+ }
#endif /* CONFIG_44x */
-#ifdef CONFIG_FSL_BOOKE
#ifdef CONFIG_E200
{ /* e200z5 */
.pvr_mask = 0xfff00000,
@@ -1451,7 +1473,19 @@
.machine_check = machine_check_e200,
.platform = "ppc5554",
},
-#elif defined(CONFIG_E500)
+ { /* default match */
+ .pvr_mask = 0x00000000,
+ .pvr_value = 0x00000000,
+ .cpu_name = "(generic E200 PPC)",
+ .cpu_features = CPU_FTRS_E200,
+ .cpu_user_features = COMMON_USER_BOOKE |
+ PPC_FEATURE_HAS_EFP_SINGLE |
+ PPC_FEATURE_UNIFIED_CACHE,
+ .dcache_bsize = 32,
+ .machine_check = machine_check_e200,
+ .platform = "ppc5554",
+#endif /* CONFIG_E200 */
+#ifdef CONFIG_E500
{ /* e500 */
.pvr_mask = 0xffff0000,
.pvr_value = 0x80200000,
@@ -1487,20 +1521,19 @@
.machine_check = machine_check_e500,
.platform = "ppc8548",
},
-#endif
-#endif
-#if !CLASSIC_PPC
{ /* default match */
.pvr_mask = 0x00000000,
.pvr_value = 0x00000000,
- .cpu_name = "(generic PPC)",
- .cpu_features = CPU_FTRS_GENERIC_32,
- .cpu_user_features = PPC_FEATURE_32,
+ .cpu_name = "(generic E500 PPC)",
+ .cpu_features = CPU_FTRS_E500,
+ .cpu_user_features = COMMON_USER_BOOKE |
+ PPC_FEATURE_HAS_SPE_COMP |
+ PPC_FEATURE_HAS_EFP_SINGLE_COMP,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .machine_check = machine_check_e500,
.platform = "powerpc",
- }
-#endif /* !CLASSIC_PPC */
+#endif /* CONFIG_E500 */
#endif /* CONFIG_PPC32 */
};
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index b84ec6a..c2b9dc4 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -653,7 +653,14 @@
rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */
rlwimi r12, r10, 0, 26, 31 /* Insert static perms */
- rlwinm r12, r12, 0, 20, 15 /* Clear U0-U3 */
+
+ /*
+ * Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added
+ * on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see
+ * include/asm-powerpc/pgtable-ppc32.h for details).
+ */
+ rlwinm r12, r12, 0, 20, 10
+
tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */
/* Done...restore registers and get out of here.
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 024805e..25e84c0 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -1517,10 +1517,6 @@
addi r2,r2,0x4000
add r2,r2,r26
- /* Set initial ptr to current */
- LOAD_REG_IMMEDIATE(r4, init_task)
- std r4,PACACURRENT(r13)
-
/* Do very early kernel initializations, including initial hash table,
* stab and slb setup before we turn on relocation. */
diff --git a/arch/powerpc/kernel/isa-bridge.c b/arch/powerpc/kernel/isa-bridge.c
index 289af34..4d5731b 100644
--- a/arch/powerpc/kernel/isa-bridge.c
+++ b/arch/powerpc/kernel/isa-bridge.c
@@ -108,9 +108,6 @@
if (size > 0x10000)
size = 0x10000;
- printk(KERN_ERR "no ISA IO ranges or unexpected isa range, "
- "mapping 64k\n");
-
__ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE,
size, _PAGE_NO_CACHE|_PAGE_GUARDED);
return;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 25e3fd8..098fd96 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -170,6 +170,8 @@
void __init early_setup(unsigned long dt_ptr)
{
+ /* -------- printk is _NOT_ safe to use here ! ------- */
+
/* Fill in any unititialised pacas */
initialise_pacas();
@@ -179,12 +181,14 @@
/* Assume we're on cpu 0 for now. Don't write to the paca yet! */
setup_paca(0);
- /* Enable early debugging if any specified (see udbg.h) */
- udbg_early_init();
-
/* Initialize lockdep early or else spinlocks will blow */
lockdep_init();
+ /* -------- printk is now safe to use ------- */
+
+ /* Enable early debugging if any specified (see udbg.h) */
+ udbg_early_init();
+
DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
/*
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 04f74f9..5bf7df1 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -35,6 +35,7 @@
#include <linux/percpu.h>
#include <linux/types.h>
#include <linux/ioport.h>
+#include <linux/kernel_stat.h>
#include <asm/io.h>
#include <asm/pgtable.h>
@@ -231,6 +232,54 @@
"IBM,CBEA-Internal-Interrupt-Controller");
}
+extern int noirqdebug;
+
+static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
+{
+ const unsigned int cpu = smp_processor_id();
+
+ spin_lock(&desc->lock);
+
+ desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
+
+ /*
+ * If we're currently running this IRQ, or its disabled,
+ * we shouldn't process the IRQ. Mark it pending, handle
+ * the necessary masking and go out
+ */
+ if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
+ !desc->action)) {
+ desc->status |= IRQ_PENDING;
+ goto out_eoi;
+ }
+
+ kstat_cpu(cpu).irqs[irq]++;
+
+ /* Mark the IRQ currently in progress.*/
+ desc->status |= IRQ_INPROGRESS;
+
+ do {
+ struct irqaction *action = desc->action;
+ irqreturn_t action_ret;
+
+ if (unlikely(!action))
+ goto out_eoi;
+
+ desc->status &= ~IRQ_PENDING;
+ spin_unlock(&desc->lock);
+ action_ret = handle_IRQ_event(irq, action);
+ if (!noirqdebug)
+ note_interrupt(irq, desc, action_ret);
+ spin_lock(&desc->lock);
+
+ } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
+
+ desc->status &= ~IRQ_INPROGRESS;
+out_eoi:
+ desc->chip->eoi(irq);
+ spin_unlock(&desc->lock);
+}
+
static int iic_host_map(struct irq_host *h, unsigned int virq,
irq_hw_number_t hw)
{
@@ -240,10 +289,10 @@
break;
case IIC_IRQ_TYPE_IOEXC:
set_irq_chip_and_handler(virq, &iic_ioexc_chip,
- handle_fasteoi_irq);
+ handle_iic_irq);
break;
default:
- set_irq_chip_and_handler(virq, &iic_chip, handle_fasteoi_irq);
+ set_irq_chip_and_handler(virq, &iic_chip, handle_iic_irq);
}
return 0;
}
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index 6bab44b..70c6601 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -141,6 +141,10 @@
if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
+ else {
+ set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
+ mb();
+ }
}
static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
@@ -226,11 +230,13 @@
return 0;
}
- spu->class_0_pending = 0;
- spu->dar = ea;
- spu->dsisr = dsisr;
+ spu->class_1_dar = ea;
+ spu->class_1_dsisr = dsisr;
- spu->stop_callback(spu);
+ spu->stop_callback(spu, 1);
+
+ spu->class_1_dar = 0;
+ spu->class_1_dsisr = 0;
return 0;
}
@@ -318,11 +324,15 @@
stat = spu_int_stat_get(spu, 0) & mask;
spu->class_0_pending |= stat;
- spu->dsisr = spu_mfc_dsisr_get(spu);
- spu->dar = spu_mfc_dar_get(spu);
+ spu->class_0_dsisr = spu_mfc_dsisr_get(spu);
+ spu->class_0_dar = spu_mfc_dar_get(spu);
spin_unlock(&spu->register_lock);
- spu->stop_callback(spu);
+ spu->stop_callback(spu, 0);
+
+ spu->class_0_pending = 0;
+ spu->class_0_dsisr = 0;
+ spu->class_0_dar = 0;
spu_int_stat_clear(spu, 0, stat);
@@ -363,6 +373,9 @@
if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
;
+ spu->class_1_dsisr = 0;
+ spu->class_1_dar = 0;
+
return stat ? IRQ_HANDLED : IRQ_NONE;
}
@@ -396,10 +409,10 @@
spu->ibox_callback(spu);
if (stat & CLASS2_SPU_STOP_INTR)
- spu->stop_callback(spu);
+ spu->stop_callback(spu, 2);
if (stat & CLASS2_SPU_HALT_INTR)
- spu->stop_callback(spu);
+ spu->stop_callback(spu, 2);
if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
spu->mfc_callback(spu);
diff --git a/arch/powerpc/platforms/cell/spu_priv1_mmio.c b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
index 67fa724..906a0a2 100644
--- a/arch/powerpc/platforms/cell/spu_priv1_mmio.c
+++ b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
@@ -28,6 +28,7 @@
#include <linux/io.h>
#include <linux/mutex.h>
#include <linux/device.h>
+#include <linux/sched.h>
#include <asm/spu.h>
#include <asm/spu_priv1.h>
@@ -75,8 +76,19 @@
static void cpu_affinity_set(struct spu *spu, int cpu)
{
- u64 target = iic_get_target_id(cpu);
- u64 route = target << 48 | target << 32 | target << 16;
+ u64 target;
+ u64 route;
+
+ if (nr_cpus_node(spu->node)) {
+ cpumask_t spumask = node_to_cpumask(spu->node);
+ cpumask_t cpumask = node_to_cpumask(cpu_to_node(cpu));
+
+ if (!cpus_intersects(spumask, cpumask))
+ return;
+ }
+
+ target = iic_get_target_id(cpu);
+ route = target << 48 | target << 32 | target << 16;
out_be64(&spu->priv1->int_route_RW, route);
}
diff --git a/arch/powerpc/platforms/cell/spufs/fault.c b/arch/powerpc/platforms/cell/spufs/fault.c
index e46d300..f093a58 100644
--- a/arch/powerpc/platforms/cell/spufs/fault.c
+++ b/arch/powerpc/platforms/cell/spufs/fault.c
@@ -83,13 +83,18 @@
return 0;
if (stat & CLASS0_DMA_ALIGNMENT_INTR)
- spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_DMA_ALIGNMENT);
+ spufs_handle_event(ctx, ctx->csa.class_0_dar,
+ SPE_EVENT_DMA_ALIGNMENT);
if (stat & CLASS0_INVALID_DMA_COMMAND_INTR)
- spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_INVALID_DMA);
+ spufs_handle_event(ctx, ctx->csa.class_0_dar,
+ SPE_EVENT_INVALID_DMA);
if (stat & CLASS0_SPU_ERROR_INTR)
- spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_SPE_ERROR);
+ spufs_handle_event(ctx, ctx->csa.class_0_dar,
+ SPE_EVENT_SPE_ERROR);
+
+ ctx->csa.class_0_pending = 0;
return -EIO;
}
@@ -119,8 +124,8 @@
* in time, we can still expect to get the same fault
* the immediately after the context restore.
*/
- ea = ctx->csa.dar;
- dsisr = ctx->csa.dsisr;
+ ea = ctx->csa.class_1_dar;
+ dsisr = ctx->csa.class_1_dsisr;
if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)))
return 0;
@@ -158,7 +163,7 @@
* time slicing will not preempt the context while the page fault
* handler is running. Context switch code removes mappings.
*/
- ctx->csa.dar = ctx->csa.dsisr = 0;
+ ctx->csa.class_1_dar = ctx->csa.class_1_dsisr = 0;
/*
* If we handled the fault successfully and are in runnable
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index 0c32a05..f407b24 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -23,6 +23,7 @@
#include <linux/file.h>
#include <linux/fs.h>
+#include <linux/fsnotify.h>
#include <linux/backing-dev.h>
#include <linux/init.h>
#include <linux/ioctl.h>
@@ -223,7 +224,7 @@
parent = dir->d_parent->d_inode;
ctx = SPUFS_I(dir->d_inode)->i_ctx;
- mutex_lock(&parent->i_mutex);
+ mutex_lock_nested(&parent->i_mutex, I_MUTEX_PARENT);
ret = spufs_rmdir(parent, dir);
mutex_unlock(&parent->i_mutex);
WARN_ON(ret);
@@ -618,12 +619,15 @@
mode &= ~current->fs->umask;
if (flags & SPU_CREATE_GANG)
- return spufs_create_gang(nd->path.dentry->d_inode,
+ ret = spufs_create_gang(nd->path.dentry->d_inode,
dentry, nd->path.mnt, mode);
else
- return spufs_create_context(nd->path.dentry->d_inode,
+ ret = spufs_create_context(nd->path.dentry->d_inode,
dentry, nd->path.mnt, flags, mode,
filp);
+ if (ret >= 0)
+ fsnotify_mkdir(nd->path.dentry->d_inode, dentry);
+ return ret;
out_dput:
dput(dentry);
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c
index a9c35b7..b7493b8 100644
--- a/arch/powerpc/platforms/cell/spufs/run.c
+++ b/arch/powerpc/platforms/cell/spufs/run.c
@@ -11,7 +11,7 @@
#include "spufs.h"
/* interrupt-level stop callback function. */
-void spufs_stop_callback(struct spu *spu)
+void spufs_stop_callback(struct spu *spu, int irq)
{
struct spu_context *ctx = spu->ctx;
@@ -24,9 +24,19 @@
*/
if (ctx) {
/* Copy exception arguments into module specific structure */
- ctx->csa.class_0_pending = spu->class_0_pending;
- ctx->csa.dsisr = spu->dsisr;
- ctx->csa.dar = spu->dar;
+ switch(irq) {
+ case 0 :
+ ctx->csa.class_0_pending = spu->class_0_pending;
+ ctx->csa.class_0_dsisr = spu->class_0_dsisr;
+ ctx->csa.class_0_dar = spu->class_0_dar;
+ break;
+ case 1 :
+ ctx->csa.class_1_dsisr = spu->class_1_dsisr;
+ ctx->csa.class_1_dar = spu->class_1_dar;
+ break;
+ case 2 :
+ break;
+ }
/* ensure that the exception status has hit memory before a
* thread waiting on the context's stop queue is woken */
@@ -34,11 +44,6 @@
wake_up_all(&ctx->stop_wq);
}
-
- /* Clear callback arguments from spu structure */
- spu->class_0_pending = 0;
- spu->dsisr = 0;
- spu->dar = 0;
}
int spu_stopped(struct spu_context *ctx, u32 *stat)
@@ -56,7 +61,11 @@
if (!(*stat & SPU_STATUS_RUNNING) && (*stat & stopped))
return 1;
- dsisr = ctx->csa.dsisr;
+ dsisr = ctx->csa.class_0_dsisr;
+ if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
+ return 1;
+
+ dsisr = ctx->csa.class_1_dsisr;
if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
return 1;
@@ -294,7 +303,7 @@
u32 ls_pointer, npc;
void __iomem *ls;
long spu_ret;
- int ret, ret2;
+ int ret;
/* get syscall block from local store */
npc = ctx->ops->npc_read(ctx) & ~3;
@@ -316,11 +325,9 @@
if (spu_ret <= -ERESTARTSYS) {
ret = spu_handle_restartsys(ctx, &spu_ret, &npc);
}
- ret2 = spu_acquire(ctx);
+ mutex_lock(&ctx->state_mutex);
if (ret == -ERESTARTSYS)
return ret;
- if (ret2)
- return -EINTR;
}
/* need to re-get the ls, as it may have changed when we released the
@@ -343,13 +350,14 @@
if (mutex_lock_interruptible(&ctx->run_mutex))
return -ERESTARTSYS;
- spu_enable_spu(ctx);
ctx->event_return = 0;
ret = spu_acquire(ctx);
if (ret)
goto out_unlock;
+ spu_enable_spu(ctx);
+
spu_update_sched_info(ctx);
ret = spu_run_init(ctx, npc);
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 7298e7d..2e411f2 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -140,6 +140,9 @@
* if it is timesliced or preempted.
*/
ctx->cpus_allowed = current->cpus_allowed;
+
+ /* Save the current cpu id for spu interrupt routing. */
+ ctx->last_ran = raw_smp_processor_id();
}
void spu_update_sched_info(struct spu_context *ctx)
@@ -243,7 +246,6 @@
spu_switch_log_notify(spu, ctx, SWITCH_LOG_START, 0);
spu_restore(&ctx->csa, spu);
spu->timestamp = jiffies;
- spu_cpu_affinity_set(spu, raw_smp_processor_id());
spu_switch_notify(spu, ctx);
ctx->state = SPU_STATE_RUNNABLE;
@@ -657,7 +659,8 @@
victim->stats.invol_ctx_switch++;
spu->stats.invol_ctx_switch++;
- spu_add_to_rq(victim);
+ if (test_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags))
+ spu_add_to_rq(victim);
mutex_unlock(&victim->state_mutex);
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 7312745..454c277 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -121,6 +121,7 @@
cpumask_t cpus_allowed;
int policy;
int prio;
+ int last_ran;
/* statistics */
struct {
@@ -331,7 +332,7 @@
/* irq callback funcs. */
void spufs_ibox_callback(struct spu *spu);
void spufs_wbox_callback(struct spu *spu);
-void spufs_stop_callback(struct spu *spu);
+void spufs_stop_callback(struct spu *spu, int irq);
void spufs_mfc_callback(struct spu *spu);
void spufs_dma_callback(struct spu *spu, int type);
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index d2a1249..3df9a36 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -132,6 +132,14 @@
spu_int_mask_set(spu, 2, 0ul);
eieio();
spin_unlock_irq(&spu->register_lock);
+
+ /*
+ * This flag needs to be set before calling synchronize_irq so
+ * that the update will be visible to the relevant handlers
+ * via a simple load.
+ */
+ set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
+ clear_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
synchronize_irq(spu->irqs[0]);
synchronize_irq(spu->irqs[1]);
synchronize_irq(spu->irqs[2]);
@@ -166,9 +174,8 @@
/* Save, Step 7:
* Restore, Step 5:
* Set a software context switch pending flag.
+ * Done above in Step 3 - disable_interrupts().
*/
- set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
- mb();
}
static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
@@ -186,20 +193,21 @@
MFC_CNTL_SUSPEND_COMPLETE);
/* fall through */
case MFC_CNTL_SUSPEND_COMPLETE:
- if (csa) {
+ if (csa)
csa->priv2.mfc_control_RW =
- MFC_CNTL_SUSPEND_MASK |
+ in_be64(&priv2->mfc_control_RW) |
MFC_CNTL_SUSPEND_DMA_QUEUE;
- }
break;
case MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION:
out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE);
POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &
MFC_CNTL_SUSPEND_DMA_STATUS_MASK) ==
MFC_CNTL_SUSPEND_COMPLETE);
- if (csa) {
- csa->priv2.mfc_control_RW = 0;
- }
+ if (csa)
+ csa->priv2.mfc_control_RW =
+ in_be64(&priv2->mfc_control_RW) &
+ ~MFC_CNTL_SUSPEND_DMA_QUEUE &
+ ~MFC_CNTL_SUSPEND_MASK;
break;
}
}
@@ -249,16 +257,21 @@
}
}
-static inline void save_mfc_decr(struct spu_state *csa, struct spu *spu)
+static inline void save_mfc_stopped_status(struct spu_state *csa,
+ struct spu *spu)
{
struct spu_priv2 __iomem *priv2 = spu->priv2;
+ const u64 mask = MFC_CNTL_DECREMENTER_RUNNING |
+ MFC_CNTL_DMA_QUEUES_EMPTY;
/* Save, Step 12:
* Read MFC_CNTL[Ds]. Update saved copy of
* CSA.MFC_CNTL[Ds].
+ *
+ * update: do the same with MFC_CNTL[Q].
*/
- csa->priv2.mfc_control_RW |=
- in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DECREMENTER_RUNNING;
+ csa->priv2.mfc_control_RW &= ~mask;
+ csa->priv2.mfc_control_RW |= in_be64(&priv2->mfc_control_RW) & mask;
}
static inline void halt_mfc_decr(struct spu_state *csa, struct spu *spu)
@@ -462,7 +475,9 @@
* Restore, Step 14.
* Write MFC_CNTL[Pc]=1 (purge queue).
*/
- out_be64(&priv2->mfc_control_RW, MFC_CNTL_PURGE_DMA_REQUEST);
+ out_be64(&priv2->mfc_control_RW,
+ MFC_CNTL_PURGE_DMA_REQUEST |
+ MFC_CNTL_SUSPEND_MASK);
eieio();
}
@@ -725,10 +740,14 @@
/* Save, Step 48:
* Restore, Step 23.
* Change the software context switch pending flag
- * to context switch active.
+ * to context switch active. This implementation does
+ * not uses a switch active flag.
*
- * This implementation does not uses a switch active flag.
+ * Now that we have saved the mfc in the csa, we can add in the
+ * restart command if an exception occurred.
*/
+ if (test_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags))
+ csa->priv2.mfc_control_RW |= MFC_CNTL_RESTART_DMA_COMMAND;
clear_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
mb();
}
@@ -1690,6 +1709,13 @@
eieio();
}
+static inline void set_int_route(struct spu_state *csa, struct spu *spu)
+{
+ struct spu_context *ctx = spu->ctx;
+
+ spu_cpu_affinity_set(spu, ctx->last_ran);
+}
+
static inline void restore_other_spu_access(struct spu_state *csa,
struct spu *spu)
{
@@ -1721,15 +1747,15 @@
*/
out_be64(&priv2->mfc_control_RW, csa->priv2.mfc_control_RW);
eieio();
+
/*
- * FIXME: this is to restart a DMA that we were processing
- * before the save. better remember the fault information
- * in the csa instead.
+ * The queue is put back into the same state that was evident prior to
+ * the context switch. The suspend flag is added to the saved state in
+ * the csa, if the operational state was suspending or suspended. In
+ * this case, the code that suspended the mfc is responsible for
+ * continuing it. Note that SPE faults do not change the operational
+ * state of the spu.
*/
- if ((csa->priv2.mfc_control_RW & MFC_CNTL_SUSPEND_DMA_QUEUE_MASK)) {
- out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
- eieio();
- }
}
static inline void enable_user_access(struct spu_state *csa, struct spu *spu)
@@ -1788,7 +1814,7 @@
save_spu_runcntl(prev, spu); /* Step 9. */
save_mfc_sr1(prev, spu); /* Step 10. */
save_spu_status(prev, spu); /* Step 11. */
- save_mfc_decr(prev, spu); /* Step 12. */
+ save_mfc_stopped_status(prev, spu); /* Step 12. */
halt_mfc_decr(prev, spu); /* Step 13. */
save_timebase(prev, spu); /* Step 14. */
remove_other_spu_access(prev, spu); /* Step 15. */
@@ -2000,6 +2026,7 @@
check_ppuint_mb_stat(next, spu); /* Step 67. */
spu_invalidate_slbs(spu); /* Modified Step 68. */
restore_mfc_sr1(next, spu); /* Step 69. */
+ set_int_route(next, spu); /* NEW */
restore_other_spu_access(next, spu); /* Step 70. */
restore_spu_runcntl(next, spu); /* Step 71. */
restore_mfc_cntl(next, spu); /* Step 72. */
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 1814adb..b4a54c5 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -1387,28 +1387,59 @@
resource_size_t size = res->end - res->start + 1;
u64 sa;
- /* Calculate window size */
- sa = (0xffffffffffffffffull << ilog2(size));;
- if (res->flags & IORESOURCE_PREFETCH)
- sa |= 0x8;
+ if (port->endpoint) {
+ resource_size_t ep_addr = 0;
+ resource_size_t ep_size = 32 << 20;
- out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
- out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
+ /* Currently we map a fixed 64MByte window to PLB address
+ * 0 (SDRAM). This should probably be configurable via a dts
+ * property.
+ */
- /* The setup of the split looks weird to me ... let's see if it works */
- out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
- out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
- out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
- out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
- out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
- out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
+ /* Calculate window size */
+ sa = (0xffffffffffffffffull << ilog2(ep_size));;
+
+ /* Setup BAR0 */
+ out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
+ out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) |
+ PCI_BASE_ADDRESS_MEM_TYPE_64);
+
+ /* Disable BAR1 & BAR2 */
+ out_le32(mbase + PECFG_BAR1MPA, 0);
+ out_le32(mbase + PECFG_BAR2HMPA, 0);
+ out_le32(mbase + PECFG_BAR2LMPA, 0);
+
+ out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa));
+ out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa));
+
+ out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr));
+ out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr));
+ } else {
+ /* Calculate window size */
+ sa = (0xffffffffffffffffull << ilog2(size));;
+ if (res->flags & IORESOURCE_PREFETCH)
+ sa |= 0x8;
+
+ out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
+ out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
+
+ /* The setup of the split looks weird to me ... let's see
+ * if it works
+ */
+ out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
+ out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
+ out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
+ out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
+ out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
+ out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
+
+ out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
+ out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
+ }
/* Enable inbound mapping */
out_le32(mbase + PECFG_PIMEN, 0x1);
- out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
- out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
-
/* Enable I/O, Mem, and Busmaster cycles */
out_le16(mbase + PCI_COMMAND,
in_le16(mbase + PCI_COMMAND) |
@@ -1422,13 +1453,8 @@
const int *bus_range;
int primary = 0, busses;
void __iomem *mbase = NULL, *cfg_data = NULL;
-
- /* XXX FIXME: Handle endpoint mode properly */
- if (port->endpoint) {
- printk(KERN_WARNING "PCIE%d: Port in endpoint mode !\n",
- port->index);
- return;
- }
+ const u32 *pval;
+ u32 val;
/* Check if primary bridge */
if (of_get_property(port->node, "primary", NULL))
@@ -1462,21 +1488,30 @@
hose->last_busno = hose->first_busno + busses;
}
- /* We map the external config space in cfg_data and the host config
- * space in cfg_addr. External space is 1M per bus, internal space
- * is 4K
+ if (!port->endpoint) {
+ /* Only map the external config space in cfg_data for
+ * PCIe root-complexes. External space is 1M per bus
+ */
+ cfg_data = ioremap(port->cfg_space.start +
+ (hose->first_busno + 1) * 0x100000,
+ busses * 0x100000);
+ if (cfg_data == NULL) {
+ printk(KERN_ERR "%s: Can't map external config space !",
+ port->node->full_name);
+ goto fail;
+ }
+ hose->cfg_data = cfg_data;
+ }
+
+ /* Always map the host config space in cfg_addr.
+ * Internal space is 4K
*/
- cfg_data = ioremap(port->cfg_space.start +
- (hose->first_busno + 1) * 0x100000,
- busses * 0x100000);
mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000);
- if (cfg_data == NULL || mbase == NULL) {
- printk(KERN_ERR "%s: Can't map config space !",
+ if (mbase == NULL) {
+ printk(KERN_ERR "%s: Can't map internal config space !",
port->node->full_name);
goto fail;
}
-
- hose->cfg_data = cfg_data;
hose->cfg_addr = mbase;
pr_debug("PCIE %s, bus %d..%d\n", port->node->full_name,
@@ -1489,12 +1524,14 @@
port->hose = hose;
mbase = (void __iomem *)hose->cfg_addr;
- /*
- * Set bus numbers on our root port
- */
- out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
- out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
- out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
+ if (!port->endpoint) {
+ /*
+ * Set bus numbers on our root port
+ */
+ out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
+ out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
+ out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
+ }
/*
* OMRs are already reset, also disable PIMs
@@ -1515,17 +1552,49 @@
ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window);
/* The root complex doesn't show up if we don't set some vendor
- * and device IDs into it. Those are the same bogus one that the
- * initial code in arch/ppc add. We might want to change that.
+ * and device IDs into it. The defaults below are the same bogus
+ * one that the initial code in arch/ppc had. This can be
+ * overwritten by setting the "vendor-id/device-id" properties
+ * in the pciex node.
*/
- out_le16(mbase + 0x200, 0xaaa0 + port->index);
- out_le16(mbase + 0x202, 0xbed0 + port->index);
- /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
- out_le32(mbase + 0x208, 0x06040001);
+ /* Get the (optional) vendor-/device-id from the device-tree */
+ pval = of_get_property(port->node, "vendor-id", NULL);
+ if (pval) {
+ val = *pval;
+ } else {
+ if (!port->endpoint)
+ val = 0xaaa0 + port->index;
+ else
+ val = 0xeee0 + port->index;
+ }
+ out_le16(mbase + 0x200, val);
- printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
- port->index);
+ pval = of_get_property(port->node, "device-id", NULL);
+ if (pval) {
+ val = *pval;
+ } else {
+ if (!port->endpoint)
+ val = 0xbed0 + port->index;
+ else
+ val = 0xfed0 + port->index;
+ }
+ out_le16(mbase + 0x202, val);
+
+ if (!port->endpoint) {
+ /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
+ out_le32(mbase + 0x208, 0x06040001);
+
+ printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
+ port->index);
+ } else {
+ /* Set Class Code to Processor/PPC */
+ out_le32(mbase + 0x208, 0x0b200001);
+
+ printk(KERN_INFO "PCIE%d: successfully set as endpoint\n",
+ port->index);
+ }
+
return;
fail:
if (hose)
@@ -1542,6 +1611,7 @@
const u32 *pval;
int portno;
unsigned int dcrs;
+ const char *val;
/* First, proceed to core initialization as we assume there's
* only one PCIe core in the system
@@ -1573,8 +1643,20 @@
}
port->sdr_base = *pval;
- /* XXX Currently, we only support root complex mode */
- port->endpoint = 0;
+ /* Check if device_type property is set to "pci" or "pci-endpoint".
+ * Resulting from this setup this PCIe port will be configured
+ * as root-complex or as endpoint.
+ */
+ val = of_get_property(port->node, "device_type", NULL);
+ if (!strcmp(val, "pci-endpoint")) {
+ port->endpoint = 1;
+ } else if (!strcmp(val, "pci")) {
+ port->endpoint = 0;
+ } else {
+ printk(KERN_ERR "PCIE: missing or incorrect device_type for %s\n",
+ np->full_name);
+ return;
+ }
/* Fetch config space registers address */
if (of_address_to_resource(np, 0, &port->cfg_space)) {
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 52c7478..1702de9 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2842,9 +2842,11 @@
DUMP_FIELD(spu, "0x%lx", ls_size);
DUMP_FIELD(spu, "0x%x", node);
DUMP_FIELD(spu, "0x%lx", flags);
- DUMP_FIELD(spu, "0x%lx", dar);
- DUMP_FIELD(spu, "0x%lx", dsisr);
DUMP_FIELD(spu, "%d", class_0_pending);
+ DUMP_FIELD(spu, "0x%lx", class_0_dar);
+ DUMP_FIELD(spu, "0x%lx", class_0_dsisr);
+ DUMP_FIELD(spu, "0x%lx", class_1_dar);
+ DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
DUMP_FIELD(spu, "0x%lx", irqs[0]);
DUMP_FIELD(spu, "0x%lx", irqs[1]);
DUMP_FIELD(spu, "0x%lx", irqs[2]);
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 6a679c3..8a68160 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -448,14 +448,6 @@
Select Dreamcast if configuring for a SEGA Dreamcast.
More information at <http://www.linux-sh.org>
-config SH_MPC1211
- bool "Interface MPC1211"
- depends on CPU_SUBTYPE_SH7751 && BROKEN
- help
- CTP/PCI-SH02 is a CPU module computer that is produced
- by Interface Corporation.
- More information at <http://www.interface.co.jp>
-
config SH_SH03
bool "Interface CTP/PCI-SH03"
depends on CPU_SUBTYPE_SH7751
@@ -657,8 +649,7 @@
endmenu
config ISA_DMA_API
- def_bool y
- depends on SH_MPC1211
+ bool
menu "Kernel features"
@@ -666,7 +657,7 @@
config KEXEC
bool "kexec system call (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+ depends on SUPERH32 && EXPERIMENTAL
help
kexec is a system call that implements the ability to shutdown your
current kernel, and to start another kernel. It is like a reboot
@@ -683,7 +674,7 @@
config CRASH_DUMP
bool "kernel crash dumps (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+ depends on SUPERH32 && EXPERIMENTAL
help
Generate crash dump after being started by kexec.
This should be normally only set in special crash dump kernels
@@ -763,7 +754,7 @@
config ZERO_PAGE_OFFSET
hex "Zero page offset"
- default "0x00004000" if SH_MPC1211 || SH_SH03
+ default "0x00004000" if SH_SH03
default "0x00010000" if PAGE_SIZE_64KB
default "0x00002000" if PAGE_SIZE_8KB
default "0x00001000"
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index d9d28f9..0d2ef1e 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -7,6 +7,7 @@
config SH_STANDARD_BIOS
bool "Use LinuxSH standard BIOS"
+ depends on SUPERH32
help
Say Y here if your target has the gdb-sh-stub
package from www.m17n.org (or any conforming standard LinuxSH BIOS)
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index bb06f83..8050b03 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -110,7 +110,6 @@
machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE) += se/7721
machdir-$(CONFIG_SH_HP6XX) += hp6xx
machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
-machdir-$(CONFIG_SH_MPC1211) += mpc1211
machdir-$(CONFIG_SH_SH03) += sh03
machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear
machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d
diff --git a/arch/sh/boards/mpc1211/Makefile b/arch/sh/boards/mpc1211/Makefile
deleted file mode 100644
index 8cd31b5..0000000
--- a/arch/sh/boards/mpc1211/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for the Interface (CTP/PCI/MPC-SH02) specific parts of the kernel
-#
-
-obj-y := setup.o rtc.o
-
-obj-$(CONFIG_PCI) += pci.o
-
diff --git a/arch/sh/boards/mpc1211/pci.c b/arch/sh/boards/mpc1211/pci.c
deleted file mode 100644
index 23849f7..0000000
--- a/arch/sh/boards/mpc1211/pci.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/*
- * Low-Level PCI Support for the MPC-1211(CTP/PCI/MPC-SH02)
- *
- * (c) 2002-2003 Saito.K & Jeanne
- *
- * Dustin McIntire (dustin@sensoria.com)
- * Derived from arch/i386/kernel/pci-*.c which bore the message:
- * (c) 1999--2000 Martin Mares <mj@ucw.cz>
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- */
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/pci.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/errno.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-
-#include <asm/machvec.h>
-#include <asm/io.h>
-#include <asm/mpc1211/pci.h>
-
-static struct resource mpcpci_io_resource = {
- "MPCPCI IO",
- 0x00000000,
- 0xffffffff,
- IORESOURCE_IO
-};
-
-static struct resource mpcpci_mem_resource = {
- "MPCPCI mem",
- 0x00000000,
- 0xffffffff,
- IORESOURCE_MEM
-};
-
-static struct pci_ops pci_direct_conf1;
-struct pci_channel board_pci_channels[] = {
- {&pci_direct_conf1, &mpcpci_io_resource, &mpcpci_mem_resource, 0, 256},
- {NULL, NULL, NULL, 0, 0},
-};
-
-/*
- * Direct access to PCI hardware...
- */
-
-
-#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
-
-/*
- * Functions for accessing PCI configuration space with type 1 accesses
- */
-static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
-{
- u32 word;
- unsigned long flags;
-
- /*
- * PCIPDR may only be accessed as 32 bit words,
- * so we must do byte alignment by hand
- */
- local_irq_save(flags);
- writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
- word = readl(PCIPDR);
- local_irq_restore(flags);
-
- switch (size) {
- case 1:
- switch (where & 0x3) {
- case 3:
- *value = (u8)(word >> 24);
- break;
- case 2:
- *value = (u8)(word >> 16);
- break;
- case 1:
- *value = (u8)(word >> 8);
- break;
- default:
- *value = (u8)word;
- break;
- }
- break;
- case 2:
- switch (where & 0x3) {
- case 3:
- *value = (u16)(word >> 24);
- local_irq_save(flags);
- writel(CONFIG_CMD(bus,devfn,(where+1)), PCIPAR);
- word = readl(PCIPDR);
- local_irq_restore(flags);
- *value |= ((word & 0xff) << 8);
- break;
- case 2:
- *value = (u16)(word >> 16);
- break;
- case 1:
- *value = (u16)(word >> 8);
- break;
- default:
- *value = (u16)word;
- break;
- }
- break;
- case 4:
- *value = word;
- break;
- }
- PCIDBG(4,"pci_conf1_read@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),*value);
- return PCIBIOS_SUCCESSFUL;
-}
-
-/*
- * Since MPC-1211 only does 32bit access we'll have to do a read,mask,write operation.
- * We'll allow an odd byte offset, though it should be illegal.
- */
-static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
-{
- u32 word,mask = 0;
- unsigned long flags;
- u32 shift = (where & 3) * 8;
-
- if(size == 1) {
- mask = ((1 << 8) - 1) << shift; // create the byte mask
- } else if(size == 2){
- if(shift == 24)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mask = ((1 << 16) - 1) << shift; // create the word mask
- }
- local_irq_save(flags);
- writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
- if(size == 4){
- writel(value, PCIPDR);
- local_irq_restore(flags);
- PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),value);
- return PCIBIOS_SUCCESSFUL;
- }
- word = readl(PCIPDR);
- word &= ~mask;
- word |= ((value << shift) & mask);
- writel(word, PCIPDR);
- local_irq_restore(flags);
- PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),word);
- return PCIBIOS_SUCCESSFUL;
-}
-
-#undef CONFIG_CMD
-
-static struct pci_ops pci_direct_conf1 = {
- .read = pci_conf1_read,
- .write = pci_conf1_write,
-};
-
-static void __devinit quirk_ali_ide_ports(struct pci_dev *dev)
-{
- dev->resource[0].start = 0x1f0;
- dev->resource[0].end = 0x1f7;
- dev->resource[0].flags = IORESOURCE_IO;
- dev->resource[1].start = 0x3f6;
- dev->resource[1].end = 0x3f6;
- dev->resource[1].flags = IORESOURCE_IO;
- dev->resource[2].start = 0x170;
- dev->resource[2].end = 0x177;
- dev->resource[2].flags = IORESOURCE_IO;
- dev->resource[3].start = 0x376;
- dev->resource[3].end = 0x376;
- dev->resource[3].flags = IORESOURCE_IO;
- dev->resource[4].start = 0xf000;
- dev->resource[4].end = 0xf00f;
- dev->resource[4].flags = IORESOURCE_IO;
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports);
-
-char * __devinit pcibios_setup(char *str)
-{
- return str;
-}
-
-/*
- * Called after each bus is probed, but before its children
- * are examined.
- */
-
-void __devinit pcibios_fixup_bus(struct pci_bus *b)
-{
- pci_read_bridge_bases(b);
-}
-
-/*
- * IRQ functions
- */
-static inline u8 bridge_swizzle(u8 pin, u8 slot)
-{
- return (((pin-1) + slot) % 4) + 1;
-}
-
-static inline u8 bridge_swizzle_pci_1(u8 pin, u8 slot)
-{
- return (((pin-1) - slot) & 3) + 1;
-}
-
-static u8 __init mpc1211_swizzle(struct pci_dev *dev, u8 *pinp)
-{
- unsigned long flags;
- u8 pin = *pinp;
- u32 word;
-
- for ( ; dev->bus->self; dev = dev->bus->self) {
- if (!pin)
- continue;
-
- if (dev->bus->number == 1) {
- local_irq_save(flags);
- writel(0x80000000 | 0x2c, PCIPAR);
- word = readl(PCIPDR);
- local_irq_restore(flags);
- word >>= 16;
-
- if (word == 0x0001)
- pin = bridge_swizzle_pci_1(pin, PCI_SLOT(dev->devfn));
- else
- pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
- } else
- pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
- }
-
- *pinp = pin;
-
- return PCI_SLOT(dev->devfn);
-}
-
-static int __init map_mpc1211_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
- int irq = -1;
-
- /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */
- if (dev->bus->number == 0) {
- switch (slot) {
- case 13: irq = 9; break; /* USB */
- case 22: irq = 10; break; /* LAN */
- default: irq = 0; break;
- }
- } else {
- switch (pin) {
- case 0: irq = 0; break;
- case 1: irq = 7; break;
- case 2: irq = 9; break;
- case 3: irq = 10; break;
- case 4: irq = 11; break;
- }
- }
-
- if( irq < 0 ) {
- PCIDBG(3, "PCI: Error mapping IRQ on device %s\n", pci_name(dev));
- return irq;
- }
-
- PCIDBG(2, "Setting IRQ for slot %s to %d\n", pci_name(dev), irq);
-
- return irq;
-}
-
-void __init pcibios_fixup_irqs(void)
-{
- pci_fixup_irqs(mpc1211_swizzle, map_mpc1211_irq);
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
- resource_size_t size, resource_size_t align)
-{
- resource_size_t start = res->start;
-
- if (res->flags & IORESOURCE_IO) {
- if (start >= 0x10000UL) {
- if ((start & 0xffffUL) < 0x4000UL) {
- start = (start & 0xffff0000UL) + 0x4000UL;
- } else if ((start & 0xffffUL) >= 0xf000UL) {
- start = (start & 0xffff0000UL) + 0x10000UL;
- }
- res->start = start;
- } else {
- if (start & 0x300) {
- start = (start + 0x3ff) & ~0x3ff;
- res->start = start;
- }
- }
- }
-}
-
diff --git a/arch/sh/boards/mpc1211/rtc.c b/arch/sh/boards/mpc1211/rtc.c
deleted file mode 100644
index 03b123a..0000000
--- a/arch/sh/boards/mpc1211/rtc.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * linux/arch/sh/kernel/rtc-mpc1211.c -- MPC-1211 on-chip RTC support
- *
- * Copyright (C) 2002 Saito.K & Jeanne
- *
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/time.h>
-#include <linux/bcd.h>
-#include <linux/mc146818rtc.h>
-
-unsigned long get_cmos_time(void)
-{
- unsigned int year, mon, day, hour, min, sec;
-
- spin_lock(&rtc_lock);
-
- do {
- sec = CMOS_READ(RTC_SECONDS);
- min = CMOS_READ(RTC_MINUTES);
- hour = CMOS_READ(RTC_HOURS);
- day = CMOS_READ(RTC_DAY_OF_MONTH);
- mon = CMOS_READ(RTC_MONTH);
- year = CMOS_READ(RTC_YEAR);
- } while (sec != CMOS_READ(RTC_SECONDS));
-
- if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
- BCD_TO_BIN(sec);
- BCD_TO_BIN(min);
- BCD_TO_BIN(hour);
- BCD_TO_BIN(day);
- BCD_TO_BIN(mon);
- BCD_TO_BIN(year);
- }
-
- spin_unlock(&rtc_lock);
-
- year += 1900;
- if (year < 1970)
- year += 100;
-
- return mktime(year, mon, day, hour, min, sec);
-}
-
-void mpc1211_rtc_gettimeofday(struct timeval *tv)
-{
-
- tv->tv_sec = get_cmos_time();
- tv->tv_usec = 0;
-}
-
-/* arc/i386/kernel/time.c */
-/*
- * In order to set the CMOS clock precisely, set_rtc_mmss has to be
- * called 500 ms after the second nowtime has started, because when
- * nowtime is written into the registers of the CMOS clock, it will
- * jump to the next second precisely 500 ms later. Check the Motorola
- * MC146818A or Dallas DS12887 data sheet for details.
- *
- * BUG: This routine does not handle hour overflow properly; it just
- * sets the minutes. Usually you'll only notice that after reboot!
- */
-static int set_rtc_mmss(unsigned long nowtime)
-{
- int retval = 0;
- int real_seconds, real_minutes, cmos_minutes;
- unsigned char save_control, save_freq_select;
-
- /* gets recalled with irq locally disabled */
- spin_lock(&rtc_lock);
- save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
- CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
-
- save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
- CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
-
- cmos_minutes = CMOS_READ(RTC_MINUTES);
- if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
- BCD_TO_BIN(cmos_minutes);
-
- /*
- * since we're only adjusting minutes and seconds,
- * don't interfere with hour overflow. This avoids
- * messing with unknown time zones but requires your
- * RTC not to be off by more than 15 minutes
- */
- real_seconds = nowtime % 60;
- real_minutes = nowtime / 60;
- if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
- real_minutes += 30; /* correct for half hour time zone */
- real_minutes %= 60;
-
- if (abs(real_minutes - cmos_minutes) < 30) {
- if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
- BIN_TO_BCD(real_seconds);
- BIN_TO_BCD(real_minutes);
- }
- CMOS_WRITE(real_seconds,RTC_SECONDS);
- CMOS_WRITE(real_minutes,RTC_MINUTES);
- } else {
- printk(KERN_WARNING
- "set_rtc_mmss: can't update from %d to %d\n",
- cmos_minutes, real_minutes);
- retval = -1;
- }
-
- /* The following flags have to be released exactly in this order,
- * otherwise the DS12887 (popular MC146818A clone with integrated
- * battery and quartz) will not reset the oscillator and will not
- * update precisely 500 ms later. You won't find this mentioned in
- * the Dallas Semiconductor data sheets, but who believes data
- * sheets anyway ... -- Markus Kuhn
- */
- CMOS_WRITE(save_control, RTC_CONTROL);
- CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
- spin_unlock(&rtc_lock);
-
- return retval;
-}
-
-int mpc1211_rtc_settimeofday(const struct timeval *tv)
-{
- unsigned long nowtime = tv->tv_sec;
-
- return set_rtc_mmss(nowtime);
-}
-
-void mpc1211_time_init(void)
-{
- rtc_sh_get_time = mpc1211_rtc_gettimeofday;
- rtc_sh_set_time = mpc1211_rtc_settimeofday;
-}
-
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
deleted file mode 100644
index fede363..0000000
--- a/arch/sh/boards/mpc1211/setup.c
+++ /dev/null
@@ -1,347 +0,0 @@
-/*
- * linux/arch/sh/boards/mpc1211/setup.c
- *
- * Copyright (C) 2002 Saito.K & Jeanne, Fujii.Y
- *
- */
-
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/hdreg.h>
-#include <linux/ide.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <asm/io.h>
-#include <asm/machvec.h>
-#include <asm/mpc1211/mpc1211.h>
-#include <asm/mpc1211/pci.h>
-#include <asm/mpc1211/m1543c.h>
-
-/* ALI15X3 SMBus address offsets */
-#define SMBHSTSTS (0 + 0x3100)
-#define SMBHSTCNT (1 + 0x3100)
-#define SMBHSTSTART (2 + 0x3100)
-#define SMBHSTCMD (7 + 0x3100)
-#define SMBHSTADD (3 + 0x3100)
-#define SMBHSTDAT0 (4 + 0x3100)
-#define SMBHSTDAT1 (5 + 0x3100)
-#define SMBBLKDAT (6 + 0x3100)
-
-/* Other settings */
-#define MAX_TIMEOUT 500 /* times 1/100 sec */
-
-/* ALI15X3 command constants */
-#define ALI15X3_ABORT 0x04
-#define ALI15X3_T_OUT 0x08
-#define ALI15X3_QUICK 0x00
-#define ALI15X3_BYTE 0x10
-#define ALI15X3_BYTE_DATA 0x20
-#define ALI15X3_WORD_DATA 0x30
-#define ALI15X3_BLOCK_DATA 0x40
-#define ALI15X3_BLOCK_CLR 0x80
-
-/* ALI15X3 status register bits */
-#define ALI15X3_STS_IDLE 0x04
-#define ALI15X3_STS_BUSY 0x08
-#define ALI15X3_STS_DONE 0x10
-#define ALI15X3_STS_DEV 0x20 /* device error */
-#define ALI15X3_STS_COLL 0x40 /* collision or no response */
-#define ALI15X3_STS_TERM 0x80 /* terminated by abort */
-#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
-
-static void __init pci_write_config(unsigned long busNo,
- unsigned long devNo,
- unsigned long fncNo,
- unsigned long cnfAdd,
- unsigned long cnfData)
-{
- ctrl_outl((0x80000000
- + ((busNo & 0xff) << 16)
- + ((devNo & 0x1f) << 11)
- + ((fncNo & 0x07) << 8)
- + (cnfAdd & 0xfc)), PCIPAR);
-
- ctrl_outl(cnfData, PCIPDR);
-}
-
-/*
- Initialize IRQ setting
-*/
-
-static unsigned char m_irq_mask = 0xfb;
-static unsigned char s_irq_mask = 0xff;
-
-static void disable_mpc1211_irq(unsigned int irq)
-{
- if( irq < 8) {
- m_irq_mask |= (1 << irq);
- outb(m_irq_mask,I8259_M_MR);
- } else {
- s_irq_mask |= (1 << (irq - 8));
- outb(s_irq_mask,I8259_S_MR);
- }
-
-}
-
-static void enable_mpc1211_irq(unsigned int irq)
-{
- if( irq < 8) {
- m_irq_mask &= ~(1 << irq);
- outb(m_irq_mask,I8259_M_MR);
- } else {
- s_irq_mask &= ~(1 << (irq - 8));
- outb(s_irq_mask,I8259_S_MR);
- }
-}
-
-static inline int mpc1211_irq_real(unsigned int irq)
-{
- int value;
- int irqmask;
-
- if ( irq < 8) {
- irqmask = 1<<irq;
- outb(0x0b,I8259_M_CR); /* ISR register */
- value = inb(I8259_M_CR) & irqmask;
- outb(0x0a,I8259_M_CR); /* back ro the IPR reg */
- return value;
- }
- irqmask = 1<<(irq - 8);
- outb(0x0b,I8259_S_CR); /* ISR register */
- value = inb(I8259_S_CR) & irqmask;
- outb(0x0a,I8259_S_CR); /* back ro the IPR reg */
- return value;
-}
-
-static void mask_and_ack_mpc1211(unsigned int irq)
-{
- if(irq < 8) {
- if(m_irq_mask & (1<<irq)){
- if(!mpc1211_irq_real(irq)){
- atomic_inc(&irq_err_count)
- printk("spurious 8259A interrupt: IRQ %x\n",irq);
- }
- } else {
- m_irq_mask |= (1<<irq);
- }
- inb(I8259_M_MR); /* DUMMY */
- outb(m_irq_mask,I8259_M_MR); /* disable */
- outb(0x60+irq,I8259_M_CR); /* EOI */
-
- } else {
- if(s_irq_mask & (1<<(irq - 8))){
- if(!mpc1211_irq_real(irq)){
- atomic_inc(&irq_err_count);
- printk("spurious 8259A interrupt: IRQ %x\n",irq);
- }
- } else {
- s_irq_mask |= (1<<(irq - 8));
- }
- inb(I8259_S_MR); /* DUMMY */
- outb(s_irq_mask,I8259_S_MR); /* disable */
- outb(0x60+(irq-8),I8259_S_CR); /* EOI */
- outb(0x60+2,I8259_M_CR);
- }
-}
-
-static void end_mpc1211_irq(unsigned int irq)
-{
- enable_mpc1211_irq(irq);
-}
-
-static unsigned int startup_mpc1211_irq(unsigned int irq)
-{
- enable_mpc1211_irq(irq);
- return 0;
-}
-
-static void shutdown_mpc1211_irq(unsigned int irq)
-{
- disable_mpc1211_irq(irq);
-}
-
-static struct hw_interrupt_type mpc1211_irq_type = {
- .typename = "MPC1211-IRQ",
- .startup = startup_mpc1211_irq,
- .shutdown = shutdown_mpc1211_irq,
- .enable = enable_mpc1211_irq,
- .disable = disable_mpc1211_irq,
- .ack = mask_and_ack_mpc1211,
- .end = end_mpc1211_irq
-};
-
-static void make_mpc1211_irq(unsigned int irq)
-{
- irq_desc[irq].chip = &mpc1211_irq_type;
- irq_desc[irq].status = IRQ_DISABLED;
- irq_desc[irq].action = 0;
- irq_desc[irq].depth = 1;
- disable_mpc1211_irq(irq);
-}
-
-int mpc1211_irq_demux(int irq)
-{
- unsigned int poll;
-
- if( irq == 2 ) {
- outb(0x0c,I8259_M_CR);
- poll = inb(I8259_M_CR);
- if(poll & 0x80) {
- irq = (poll & 0x07);
- }
- if( irq == 2) {
- outb(0x0c,I8259_S_CR);
- poll = inb(I8259_S_CR);
- irq = (poll & 0x07) + 8;
- }
- }
- return irq;
-}
-
-static void __init init_mpc1211_IRQ(void)
-{
- int i;
- /*
- * Super I/O (Just mimic PC):
- * 1: keyboard
- * 3: serial 1
- * 4: serial 0
- * 5: printer
- * 6: floppy
- * 8: rtc
- * 10: lan
- * 12: mouse
- * 14: ide0
- * 15: ide1
- */
-
- pci_write_config(0,0,0,0x54, 0xb0b0002d);
- outb(0x11, I8259_M_CR); /* mater icw1 edge trigger */
- outb(0x11, I8259_S_CR); /* slave icw1 edge trigger */
- outb(0x20, I8259_M_MR); /* m icw2 base vec 0x08 */
- outb(0x28, I8259_S_MR); /* s icw2 base vec 0x70 */
- outb(0x04, I8259_M_MR); /* m icw3 slave irq2 */
- outb(0x02, I8259_S_MR); /* s icw3 slave id */
- outb(0x01, I8259_M_MR); /* m icw4 non buf normal eoi*/
- outb(0x01, I8259_S_MR); /* s icw4 non buf normal eo1*/
- outb(0xfb, I8259_M_MR); /* disable irq0--irq7 */
- outb(0xff, I8259_S_MR); /* disable irq8--irq15 */
-
- for ( i=0; i < 16; i++) {
- if(i != 2) {
- make_mpc1211_irq(i);
- }
- }
-}
-
-static void delay1000(void)
-{
- int i;
-
- for (i=0; i<1000; i++)
- ctrl_delay();
-}
-
-static int put_smb_blk(unsigned char *p, int address, int command, int no)
-{
- int temp;
- int timeout;
- int i;
-
- outb(0xff, SMBHSTSTS);
- temp = inb(SMBHSTSTS);
- for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); timeout++) {
- delay1000();
- temp = inb(SMBHSTSTS);
- }
- if (timeout >= MAX_TIMEOUT){
- return -1;
- }
-
- outb(((address & 0x7f) << 1), SMBHSTADD);
- outb(0xc0, SMBHSTCNT);
- outb(command & 0xff, SMBHSTCMD);
- outb(no & 0x1f, SMBHSTDAT0);
-
- for(i = 1; i <= no; i++) {
- outb(*p++, SMBBLKDAT);
- }
- outb(0xff, SMBHSTSTART);
-
- temp = inb(SMBHSTSTS);
- for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)); timeout++) {
- delay1000();
- temp = inb(SMBHSTSTS);
- }
- if (timeout >= MAX_TIMEOUT) {
- return -2;
- }
- if ( temp & ALI15X3_STS_ERR ){
- return -3;
- }
- return 0;
-}
-
-static struct resource heartbeat_resources[] = {
- [0] = {
- .start = 0xa2000000,
- .end = 0xa2000000,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device heartbeat_device = {
- .name = "heartbeat",
- .id = -1,
- .num_resources = ARRAY_SIZE(heartbeat_resources),
- .resource = heartbeat_resources,
-};
-
-static struct platform_device *mpc1211_devices[] __initdata = {
- &heartbeat_device,
-};
-
-static int __init mpc1211_devices_setup(void)
-{
- return platform_add_devices(mpc1211_devices,
- ARRAY_SIZE(mpc1211_devices));
-}
-__initcall(mpc1211_devices_setup);
-
-/* arch/sh/boards/mpc1211/rtc.c */
-void mpc1211_time_init(void);
-
-static void __init mpc1211_setup(char **cmdline_p)
-{
- unsigned char spd_buf[128];
-
- __set_io_port_base(PA_PCI_IO);
-
- pci_write_config(0,0,0,0x54, 0xb0b00000);
-
- do {
- outb(ALI15X3_ABORT, SMBHSTCNT);
- spd_buf[0] = 0x0c;
- spd_buf[1] = 0x43;
- spd_buf[2] = 0x7f;
- spd_buf[3] = 0x03;
- spd_buf[4] = 0x00;
- spd_buf[5] = 0x03;
- spd_buf[6] = 0x00;
- } while (put_smb_blk(spd_buf, 0x69, 0, 7) < 0);
-
- board_time_init = mpc1211_time_init;
-
- return 0;
-}
-
-/*
- * The Machine Vector
- */
-static struct sh_machine_vector mv_mpc1211 __initmv = {
- .mv_name = "Interface MPC-1211(CTP/PCI/MPC-SH02)",
- .mv_setup = mpc1211_setup,
- .mv_nr_irqs = 48,
- .mv_irq_demux = mpc1211_irq_demux,
- .mv_init_irq = init_mpc1211_IRQ,
-};
diff --git a/arch/sh/boards/renesas/migor/setup.c b/arch/sh/boards/renesas/migor/setup.c
index e7c150d..01af442 100644
--- a/arch/sh/boards/renesas/migor/setup.c
+++ b/arch/sh/boards/renesas/migor/setup.c
@@ -14,6 +14,7 @@
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
#include <linux/i2c.h>
+#include <linux/smc91x.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/sh_keysc.h>
@@ -27,6 +28,11 @@
* 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
*/
+static struct smc91x_platdata smc91x_info = {
+ .flags = SMC91X_USE_16BIT,
+ .irq_flags = IRQF_TRIGGER_HIGH,
+};
+
static struct resource smc91x_eth_resources[] = {
[0] = {
.name = "SMC91C111" ,
@@ -36,7 +42,7 @@
},
[1] = {
.start = 32, /* IRQ0 */
- .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
+ .flags = IORESOURCE_IRQ,
},
};
@@ -44,6 +50,9 @@
.name = "smc91x",
.num_resources = ARRAY_SIZE(smc91x_eth_resources),
.resource = smc91x_eth_resources,
+ .dev = {
+ .platform_data = &smc91x_info,
+ },
};
static struct sh_keysc_info sh_keysc_info = {
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
index 68f0ad1..ae1cfcb 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
@@ -62,7 +62,7 @@
static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
NULL, mask_registers, NULL, NULL);
-unsigned char * __init highlander_init_irq_r7780mp(void)
+unsigned char * __init highlander_plat_irq_setup(void)
{
if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) {
printk(KERN_INFO "Using r7780mp interrupt controller.\n");
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
index bd34048..9d3921f 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
@@ -55,7 +55,7 @@
static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
NULL, mask_registers, NULL, NULL);
-unsigned char * __init highlander_init_irq_r7780rp(void)
+unsigned char * __init highlander_plat_irq_setup(void)
{
if (ctrl_inw(0xa5000600)) {
printk(KERN_INFO "Using r7780rp interrupt controller.\n");
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
index bf7ec10..896c045 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
@@ -64,7 +64,7 @@
static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
NULL, mask_registers, NULL, NULL);
-unsigned char * __init highlander_init_irq_r7785rp(void)
+unsigned char * __init highlander_plat_irq_setup(void)
{
if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000)
return NULL;
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
index ac0a965..bc79afb 100644
--- a/arch/sh/boards/renesas/r7780rp/setup.c
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -316,7 +316,7 @@
static unsigned char irl2irq[HL_NR_IRL];
-int highlander_irq_demux(int irq)
+static int highlander_irq_demux(int irq)
{
if (irq >= HL_NR_IRL || !irl2irq[irq])
return irq;
@@ -324,27 +324,9 @@
return irl2irq[irq];
}
-void __init highlander_init_irq(void)
+static void __init highlander_init_irq(void)
{
- unsigned char *ucp = NULL;
-
- do {
-#ifdef CONFIG_SH_R7780MP
- ucp = highlander_init_irq_r7780mp();
- if (ucp)
- break;
-#endif
-#ifdef CONFIG_SH_R7785RP
- ucp = highlander_init_irq_r7785rp();
- if (ucp)
- break;
-#endif
-#ifdef CONFIG_SH_R7780RP
- ucp = highlander_init_irq_r7780rp();
- if (ucp)
- break;
-#endif
- } while (0);
+ unsigned char *ucp = highlander_plat_irq_setup();
if (ucp) {
plat_irq_setup_pins(IRQ_MODE_IRL3210);
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
index f21ee49..452d0d6 100644
--- a/arch/sh/boards/renesas/rts7751r2d/setup.c
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -109,7 +109,6 @@
.resource = heartbeat_resources,
};
-#ifdef CONFIG_MFD_SM501
static struct plat_serial8250_port uart_platform_data[] = {
{
.membase = (void __iomem *)0xb3e30000,
@@ -208,13 +207,9 @@
.resource = sm501_resources,
};
-#endif /* CONFIG_MFD_SM501 */
-
static struct platform_device *rts7751r2d_devices[] __initdata = {
-#ifdef CONFIG_MFD_SM501
&uart_device,
&sm501_device,
-#endif
&heartbeat_device,
&spi_sh_sci_device,
};
@@ -234,7 +229,9 @@
{
if (register_trapped_io(&cf_trapped_io) == 0)
platform_device_register(&cf_ide_device);
+
spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
+
return platform_add_devices(rts7751r2d_devices,
ARRAY_SIZE(rts7751r2d_devices));
}
diff --git a/arch/sh/boards/se/7206/setup.c b/arch/sh/boards/se/7206/setup.c
index 5b3ee08..4fe84cc 100644
--- a/arch/sh/boards/se/7206/setup.c
+++ b/arch/sh/boards/se/7206/setup.c
@@ -3,12 +3,13 @@
* linux/arch/sh/boards/se/7206/setup.c
*
* Copyright (C) 2006 Yoshinori Sato
- * Copyright (C) 2007 Paul Mundt
+ * Copyright (C) 2007 - 2008 Paul Mundt
*
* Hitachi 7206 SolutionEngine Support.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/smc91x.h>
#include <asm/se7206.h>
#include <asm/io.h>
#include <asm/machvec.h>
@@ -16,8 +17,9 @@
static struct resource smc91x_resources[] = {
[0] = {
- .start = 0x300,
- .end = 0x300 + 0x020 - 1,
+ .name = "smc91x-regs",
+ .start = PA_SMSC + 0x300,
+ .end = PA_SMSC + 0x300 + 0x020 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -27,9 +29,18 @@
},
};
+static struct smc91x_platdata smc91x_info = {
+ .flags = SMC91X_USE_16BIT,
+};
+
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = -1,
+ .dev = {
+ .dma_mask = NULL,
+ .coherent_dma_mask = 0xffffffff,
+ .platform_data = &smc91x_info,
+ },
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
};
diff --git a/arch/sh/boards/se/7722/setup.c b/arch/sh/boards/se/7722/setup.c
index 33f6ee7..ede3957 100644
--- a/arch/sh/boards/se/7722/setup.c
+++ b/arch/sh/boards/se/7722/setup.c
@@ -14,6 +14,7 @@
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
#include <linux/input.h>
+#include <linux/smc91x.h>
#include <asm/machvec.h>
#include <asm/se7722.h>
#include <asm/io.h>
@@ -44,6 +45,10 @@
};
/* SMC91x */
+static struct smc91x_platdata smc91x_info = {
+ .flags = SMC91X_USE_16BIT,
+};
+
static struct resource smc91x_eth_resources[] = {
[0] = {
.name = "smc91x-regs" ,
@@ -64,6 +69,7 @@
.dev = {
.dma_mask = NULL, /* don't use dma */
.coherent_dma_mask = 0xffffffff,
+ .platform_data = &smc91x_info,
},
.num_resources = ARRAY_SIZE(smc91x_eth_resources),
.resource = smc91x_eth_resources,
diff --git a/arch/sh/boot/compressed/Makefile_32 b/arch/sh/boot/compressed/Makefile_32
index 6ac8d4a..c0d25fb 100644
--- a/arch/sh/boot/compressed/Makefile_32
+++ b/arch/sh/boot/compressed/Makefile_32
@@ -6,7 +6,6 @@
targets := vmlinux vmlinux.bin vmlinux.bin.gz \
head_32.o misc_32.o piggy.o
-EXTRA_AFLAGS := -traditional
OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o
diff --git a/arch/sh/boot/compressed/Makefile_64 b/arch/sh/boot/compressed/Makefile_64
index 4334f2b..912f3e2 100644
--- a/arch/sh/boot/compressed/Makefile_64
+++ b/arch/sh/boot/compressed/Makefile_64
@@ -13,7 +13,6 @@
targets := vmlinux vmlinux.bin vmlinux.bin.gz \
head_64.o misc_64.o cache.o piggy.o
-EXTRA_AFLAGS := -traditional
OBJECTS := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \
$(obj)/cache.o
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index d6e0e2b..de45c6a 100644
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -184,9 +184,8 @@
void __init plat_irq_setup(void)
{
- unsigned long long __dummy0, __dummy1=~0x00000000100000f0;
+ unsigned long long __dummy0, __dummy1=~0x00000000100000f0;
unsigned long reg;
- unsigned long data;
int i;
intc_virt = onchip_remap(INTC_BASE, 1024, "INTC");
@@ -196,11 +195,8 @@
/* Set default: per-line enable/disable, priority driven ack/eoi */
- for (i = 0; i < NR_INTC_IRQS; i++) {
- if (platform_int_priority[i] != NO_PRIORITY) {
- irq_desc[i].chip = &intc_irq_type;
- }
- }
+ for (i = 0; i < NR_INTC_IRQS; i++)
+ irq_desc[i].chip = &intc_irq_type;
/* Disable all interrupts and set all priorities to 0 to avoid trouble */
@@ -211,35 +207,42 @@
ctrl_outl( NO_PRIORITY, reg);
- /* Set IRLM */
- /* If all the priorities are set to 'no priority', then
- * assume we are using encoded mode.
- */
- irlm = platform_int_priority[IRQ_IRL0] + platform_int_priority[IRQ_IRL1] + \
- platform_int_priority[IRQ_IRL2] + platform_int_priority[IRQ_IRL3];
+#ifdef CONFIG_SH_CAYMAN
+ {
+ unsigned long data;
- if (irlm == NO_PRIORITY) {
- /* IRLM = 0 */
- reg = INTC_ICR_CLEAR;
- i = IRQ_INTA;
- printk("Trying to use encoded IRL0-3. IRLs unsupported.\n");
- } else {
- /* IRLM = 1 */
- reg = INTC_ICR_SET;
- i = IRQ_IRL0;
- }
- ctrl_outl(INTC_ICR_IRLM, reg);
-
- /* Set interrupt priorities according to platform description */
- for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) {
- data |= platform_int_priority[i] << ((i % INTC_INTPRI_PPREG) * 4);
- if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
- /* Upon the 7th, set Priority Register */
- ctrl_outl(data, reg);
- data = 0;
- reg += 8;
+ /* Set IRLM */
+ /* If all the priorities are set to 'no priority', then
+ * assume we are using encoded mode.
+ */
+ irlm = platform_int_priority[IRQ_IRL0] +
+ platform_int_priority[IRQ_IRL1] +
+ platform_int_priority[IRQ_IRL2] +
+ platform_int_priority[IRQ_IRL3];
+ if (irlm == NO_PRIORITY) {
+ /* IRLM = 0 */
+ reg = INTC_ICR_CLEAR;
+ i = IRQ_INTA;
+ printk("Trying to use encoded IRL0-3. IRLs unsupported.\n");
+ } else {
+ /* IRLM = 1 */
+ reg = INTC_ICR_SET;
+ i = IRQ_IRL0;
}
- }
+ ctrl_outl(INTC_ICR_IRLM, reg);
+
+ /* Set interrupt priorities according to platform description */
+ for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) {
+ data |= platform_int_priority[i] <<
+ ((i % INTC_INTPRI_PPREG) * 4);
+ if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
+ /* Upon the 7th, set Priority Register */
+ ctrl_outl(data, reg);
+ data = 0;
+ reg += 8;
+ }
+ }
+#endif
/*
* And now let interrupts come in.
diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c
index 84806b2..da5dae7 100644
--- a/arch/sh/kernel/cpu/irq/intc.c
+++ b/arch/sh/kernel/cpu/irq/intc.c
@@ -1,7 +1,7 @@
/*
* Shared interrupt handling code for IPR and INTC2 types of IRQs.
*
- * Copyright (C) 2007 Magnus Damm
+ * Copyright (C) 2007, 2008 Magnus Damm
*
* Based on intc2.c and ipr.c
*
@@ -62,6 +62,9 @@
#endif
static unsigned int intc_prio_level[NR_IRQS]; /* for now */
+#ifdef CONFIG_CPU_SH3
+static unsigned long ack_handle[NR_IRQS];
+#endif
static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
{
@@ -98,17 +101,26 @@
static void modify_8(unsigned long addr, unsigned long h, unsigned long data)
{
+ unsigned long flags;
+ local_irq_save(flags);
ctrl_outb(set_field(ctrl_inb(addr), data, h), addr);
+ local_irq_restore(flags);
}
static void modify_16(unsigned long addr, unsigned long h, unsigned long data)
{
+ unsigned long flags;
+ local_irq_save(flags);
ctrl_outw(set_field(ctrl_inw(addr), data, h), addr);
+ local_irq_restore(flags);
}
static void modify_32(unsigned long addr, unsigned long h, unsigned long data)
{
+ unsigned long flags;
+ local_irq_save(flags);
ctrl_outl(set_field(ctrl_inl(addr), data, h), addr);
+ local_irq_restore(flags);
}
enum { REG_FN_ERR = 0, REG_FN_WRITE_BASE = 1, REG_FN_MODIFY_BASE = 5 };
@@ -219,6 +231,25 @@
}
}
+#ifdef CONFIG_CPU_SH3
+static void intc_mask_ack(unsigned int irq)
+{
+ struct intc_desc_int *d = get_intc_desc(irq);
+ unsigned long handle = ack_handle[irq];
+ unsigned long addr;
+
+ intc_disable(irq);
+
+ /* read register and write zero only to the assocaited bit */
+
+ if (handle) {
+ addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
+ ctrl_inb(addr);
+ ctrl_outb(0x3f ^ set_field(0, 1, handle), addr);
+ }
+}
+#endif
+
static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
unsigned int nr_hp,
unsigned int irq)
@@ -280,7 +311,12 @@
[IRQ_TYPE_EDGE_FALLING] = VALID(0),
[IRQ_TYPE_EDGE_RISING] = VALID(1),
[IRQ_TYPE_LEVEL_LOW] = VALID(2),
+ /* SH7706, SH7707 and SH7709 do not support high level triggered */
+#if !defined(CONFIG_CPU_SUBTYPE_SH7706) && \
+ !defined(CONFIG_CPU_SUBTYPE_SH7707) && \
+ !defined(CONFIG_CPU_SUBTYPE_SH7709)
[IRQ_TYPE_LEVEL_HIGH] = VALID(3),
+#endif
};
static int intc_set_sense(unsigned int irq, unsigned int type)
@@ -430,6 +466,40 @@
return 0;
}
+#ifdef CONFIG_CPU_SH3
+static unsigned int __init intc_ack_data(struct intc_desc *desc,
+ struct intc_desc_int *d,
+ intc_enum enum_id)
+{
+ struct intc_mask_reg *mr = desc->ack_regs;
+ unsigned int i, j, fn, mode;
+ unsigned long reg_e, reg_d;
+
+ for (i = 0; mr && enum_id && i < desc->nr_ack_regs; i++) {
+ mr = desc->ack_regs + i;
+
+ for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
+ if (mr->enum_ids[j] != enum_id)
+ continue;
+
+ fn = REG_FN_MODIFY_BASE;
+ mode = MODE_ENABLE_REG;
+ reg_e = mr->set_reg;
+ reg_d = mr->set_reg;
+
+ fn += (mr->reg_width >> 3) - 1;
+ return _INTC_MK(fn, mode,
+ intc_get_reg(d, reg_e),
+ intc_get_reg(d, reg_d),
+ 1,
+ (mr->reg_width - 1) - j);
+ }
+ }
+
+ return 0;
+}
+#endif
+
static unsigned int __init intc_sense_data(struct intc_desc *desc,
struct intc_desc_int *d,
intc_enum enum_id)
@@ -530,6 +600,11 @@
/* irq should be disabled by default */
d->chip.mask(irq);
+
+#ifdef CONFIG_CPU_SH3
+ if (desc->ack_regs)
+ ack_handle[irq] = intc_ack_data(desc, d, enum_id);
+#endif
}
static unsigned int __init save_reg(struct intc_desc_int *d,
@@ -560,6 +635,9 @@
d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0;
d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0;
+#ifdef CONFIG_CPU_SH3
+ d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0;
+#endif
d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg));
#ifdef CONFIG_SMP
d->smp = alloc_bootmem(d->nr_reg * sizeof(*d->smp));
@@ -592,14 +670,23 @@
}
}
- BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
-
d->chip.name = desc->name;
d->chip.mask = intc_disable;
d->chip.unmask = intc_enable;
d->chip.mask_ack = intc_disable;
d->chip.set_type = intc_set_sense;
+#ifdef CONFIG_CPU_SH3
+ if (desc->ack_regs) {
+ for (i = 0; i < desc->nr_ack_regs; i++)
+ k += save_reg(d, k, desc->ack_regs[i].set_reg, 0);
+
+ d->chip.mask_ack = intc_mask_ack;
+ }
+#endif
+
+ BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
+
for (i = 0; i < desc->nr_vectors; i++) {
struct intc_vect *vect = desc->vectors + i;
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index 5627c0b..6df2fb9 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -300,7 +300,7 @@
iy = hy & 0x7fffffff;
if (iy < 0x00800000) {
ix = denormal_subf1(ix, iy);
- if (ix < 0) {
+ if ((int) ix < 0) {
ix = -ix;
sign ^= 0x80000000;
}
@@ -385,7 +385,7 @@
iy = hy & 0x7fffffffffffffffLL;
if (iy < 0x0010000000000000LL) {
ix = denormal_subd1(ix, iy);
- if (ix < 0) {
+ if ((int) ix < 0) {
ix = -ix;
sign ^= 0x8000000000000000LL;
}
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index 3ae4d91..511de55 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -2,7 +2,7 @@
# Makefile for the Linux/SuperH SH-3 backends.
#
-obj-y := ex.o probe.o entry.o
+obj-y := ex.o probe.o entry.o setup-sh3.o
# CPU subtype setup
obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c
new file mode 100644
index 0000000..c988468
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c
@@ -0,0 +1,71 @@
+/*
+ * Shared SH3 Setup code
+ *
+ * Copyright (C) 2008 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+/* All SH3 devices are equipped with IRQ0->5 (except sh7708) */
+
+enum {
+ UNUSED = 0,
+
+ /* interrupt sources */
+ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
+};
+
+static struct intc_vect vectors_irq0123[] __initdata = {
+ INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
+ INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
+};
+
+static struct intc_vect vectors_irq45[] __initdata = {
+ INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+};
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+ { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
+ { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
+};
+
+static struct intc_mask_reg ack_registers[] __initdata = {
+ { 0xa4000004, 0, 8, /* IRR0 */
+ { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
+};
+
+static struct intc_sense_reg sense_registers[] __initdata = {
+ { 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh3-irq0123",
+ vectors_irq0123, NULL, NULL,
+ prio_registers, sense_registers, ack_registers);
+
+static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45",
+ vectors_irq45, NULL, NULL,
+ prio_registers, sense_registers, ack_registers);
+
+#define INTC_ICR1 0xa4000010UL
+#define INTC_ICR1_IRQLVL (1<<14)
+
+void __init plat_irq_setup_pins(int mode)
+{
+ if (mode == IRQ_MODE_IRQ) {
+ ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
+ register_intc_controller(&intc_desc_irq0123);
+ return;
+ }
+ BUG();
+}
+
+void __init plat_irq_setup_sh3(void)
+{
+ register_intc_controller(&intc_desc_irq45);
+}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index f581534..6468ae8 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -37,7 +37,7 @@
};
static struct intc_vect vectors[] __initdata = {
- INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+ /* IRQ0->5 are handled in setup-sh3.c */
INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
@@ -48,7 +48,7 @@
INTC_VECT(ADC_ADI, 0x980),
INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40),
INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
- INTC_VECT(TPU3, 0xc80), INTC_VECT(TPU1, 0xca0),
+ INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
@@ -81,14 +81,6 @@
static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups,
NULL, prio_registers, NULL);
-static struct intc_vect vectors_irq[] __initdata = {
- INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
- INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
-};
-
-static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL,
- NULL, prio_registers, NULL);
-
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xa4410000,
@@ -159,16 +151,8 @@
}
__initcall(sh7705_devices_setup);
-void __init plat_irq_setup_pins(int mode)
-{
- if (mode == IRQ_MODE_IRQ) {
- register_intc_controller(&intc_desc_irq);
- return;
- }
- BUG();
-}
-
void __init plat_irq_setup(void)
{
register_intc_controller(&intc_desc);
+ plat_irq_setup_sh3();
}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index d3733b1..93c55e2 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -52,7 +52,7 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
defined(CONFIG_CPU_SUBTYPE_SH7707) || \
defined(CONFIG_CPU_SUBTYPE_SH7709)
- INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+ /* IRQ0->5 are handled in setup-sh3.c */
INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
INTC_VECT(ADC_ADI, 0x980),
@@ -104,18 +104,6 @@
static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
NULL, prio_registers, NULL);
-#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
- defined(CONFIG_CPU_SUBTYPE_SH7707) || \
- defined(CONFIG_CPU_SUBTYPE_SH7709)
-static struct intc_vect vectors_irq[] __initdata = {
- INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
- INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
-};
-
-static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
- NULL, prio_registers, NULL);
-#endif
-
static struct resource rtc_resources[] = {
[0] = {
.start = 0xfffffec0,
@@ -194,24 +182,12 @@
}
__initcall(sh770x_devices_setup);
-#define INTC_ICR1 0xa4000010UL
-#define INTC_ICR1_IRQLVL (1<<14)
-
-void __init plat_irq_setup_pins(int mode)
-{
- if (mode == IRQ_MODE_IRQ) {
-#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
- defined(CONFIG_CPU_SUBTYPE_SH7707) || \
- defined(CONFIG_CPU_SUBTYPE_SH7709)
- ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
- register_intc_controller(&intc_desc_irq);
- return;
-#endif
- }
- BUG();
-}
-
void __init plat_irq_setup(void)
{
register_intc_controller(&intc_desc);
+#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7709)
+ plat_irq_setup_sh3();
+#endif
}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 7406c9a..77eee48 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -38,7 +38,7 @@
};
static struct intc_vect vectors[] __initdata = {
- INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+ /* IRQ0->5 are handled in setup-sh3.c */
INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
@@ -79,10 +79,7 @@
{ 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
{ 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
{ 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } },
- { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, DMAC2 } },
-#ifdef CONFIG_CPU_SUBTYPE_SH7710
- { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC } },
-#endif
+ { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC, DMAC2 } },
{ 0xa4080002, 0, 16, 4, /* IPRG */ { EDMAC0, EDMAC1, EDMAC2 } },
{ 0xa4080004, 0, 16, 4, /* IPRH */ { 0, 0, 0, SIOF0 } },
{ 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } },
@@ -91,14 +88,6 @@
static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
NULL, prio_registers, NULL);
-static struct intc_vect vectors_irq[] __initdata = {
- INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
- INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
-};
-
-static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL,
- NULL, prio_registers, NULL);
-
static struct resource rtc_resources[] = {
[0] = {
.start = 0xa413fec0,
@@ -170,16 +159,8 @@
}
__initcall(sh7710_devices_setup);
-void __init plat_irq_setup_pins(int mode)
-{
- if (mode == IRQ_MODE_IRQ) {
- register_intc_controller(&intc_desc_irq);
- return;
- }
- BUG();
-}
-
void __init plat_irq_setup(void)
{
register_intc_controller(&intc_desc);
+ plat_irq_setup_sh3();
}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 8028082..f807a21 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -19,10 +19,6 @@
#include <linux/serial_sci.h>
#include <asm/rtc.h>
-#define INTC_ICR1 0xA4140010UL
-#define INTC_ICR_IRLM 0x4000
-#define INTC_ICR_IRQ (~INTC_ICR_IRLM)
-
static struct resource rtc_resources[] = {
[0] = {
.start = 0xa413fec0,
@@ -170,6 +166,7 @@
};
static struct intc_vect vectors[] __initdata = {
+ /* IRQ0->5 are handled in setup-sh3.c */
INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480),
INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0),
@@ -214,11 +211,7 @@
{ 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
{ 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
{ 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
-#if defined(CONFIG_CPU_SUBTYPE_SH7720)
{ 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
-#else
- { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, 0 } },
-#endif
{ 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } },
{ 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } },
{ 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
@@ -229,32 +222,8 @@
static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
NULL, prio_registers, NULL);
-static struct intc_sense_reg sense_registers[] __initdata = {
- { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
-};
-
-static struct intc_vect vectors_irq[] __initdata = {
- INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
- INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
- INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
-};
-
-static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq,
- NULL, NULL, prio_registers, sense_registers);
-
-void __init plat_irq_setup_pins(int mode)
-{
- switch (mode) {
- case IRQ_MODE_IRQ:
- ctrl_outw(ctrl_inw(INTC_ICR1) & INTC_ICR_IRQ, INTC_ICR1);
- register_intc_controller(&intc_irq_desc);
- break;
- default:
- BUG();
- }
-}
-
void __init plat_irq_setup(void)
{
register_intc_controller(&intc_desc);
+ plat_irq_setup_sh3();
}
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index ba87501..05372ed 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -143,12 +143,22 @@
trap_jtable:
.long do_exception_error /* 0x000 */
.long do_exception_error /* 0x020 */
+#ifdef CONFIG_MMU
.long tlb_miss_load /* 0x040 */
.long tlb_miss_store /* 0x060 */
+#else
+ .long do_exception_error
+ .long do_exception_error
+#endif
! ARTIFICIAL pseudo-EXPEVT setting
.long do_debug_interrupt /* 0x080 */
+#ifdef CONFIG_MMU
.long tlb_miss_load /* 0x0A0 */
.long tlb_miss_store /* 0x0C0 */
+#else
+ .long do_exception_error
+ .long do_exception_error
+#endif
.long do_address_error_load /* 0x0E0 */
.long do_address_error_store /* 0x100 */
#ifdef CONFIG_SH_FPU
@@ -185,10 +195,18 @@
.endr
.long do_IRQ /* 0xA00 */
.long do_IRQ /* 0xA20 */
+#ifdef CONFIG_MMU
.long itlb_miss_or_IRQ /* 0xA40 */
+#else
+ .long do_IRQ
+#endif
.long do_IRQ /* 0xA60 */
.long do_IRQ /* 0xA80 */
+#ifdef CONFIG_MMU
.long itlb_miss_or_IRQ /* 0xAA0 */
+#else
+ .long do_IRQ
+#endif
.long do_exception_error /* 0xAC0 */
.long do_address_error_exec /* 0xAE0 */
.rept 8
@@ -274,6 +292,7 @@
* Instead of '.space 1024-TEXT_SIZE' place the RESVEC
* block making sure the final alignment is correct.
*/
+#ifdef CONFIG_MMU
tlb_miss:
synco /* TAKum03020 (but probably a good idea anyway.) */
putcon SP, KCR1
@@ -377,6 +396,9 @@
getcon KCR1, SP
pta handle_exception, tr0
blink tr0, ZERO
+#else /* CONFIG_MMU */
+ .balign 256
+#endif
/* NB TAKE GREAT CARE HERE TO ENSURE THAT THE INTERRUPT CODE
DOES END UP AT VBR+0x600 */
@@ -1103,6 +1125,7 @@
* fpu_error_or_IRQ? is a helper to deflect to the right cause.
*
*/
+#ifdef CONFIG_MMU
tlb_miss_load:
or SP, ZERO, r2
or ZERO, ZERO, r3 /* Read */
@@ -1132,6 +1155,7 @@
movi do_page_fault, r6
ptabs r6, tr0
blink tr0, ZERO
+#endif /* CONFIG_MMU */
fpu_error_or_IRQA:
pta its_IRQ, tr0
@@ -1481,6 +1505,7 @@
ptabs LINK, tr0
blink tr0, r63
+#ifdef CONFIG_MMU
/*
* --- User Access Handling Section
*/
@@ -1604,6 +1629,7 @@
ptabs LINK, tr0
blink tr0, ZERO
+#endif /* CONFIG_MMU */
/*
* int __strncpy_from_user(unsigned long __dest, unsigned long __src,
@@ -2014,9 +2040,11 @@
.global asm_uaccess_start /* Just a marker */
asm_uaccess_start:
+#ifdef CONFIG_MMU
.long ___copy_user1, ___copy_user_exit
.long ___copy_user2, ___copy_user_exit
.long ___clear_user1, ___clear_user_exit
+#endif
.long ___strncpy_from_user1, ___strncpy_from_user_exit
.long ___strnlen_user1, ___strnlen_user_exit
.long ___get_user_asm_b1, ___get_user_asm_b_exit
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 31f8cb0..92ad844 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -15,6 +15,7 @@
#include <linux/string.h>
#include <asm/processor.h>
#include <asm/cache.h>
+#include <asm/tlb.h>
int __init detect_cpu_and_cache_system(void)
{
@@ -67,5 +68,8 @@
set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags));
#endif
+ /* Setup some I/D TLB defaults */
+ sh64_tlb_init();
+
return 0;
}
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 957f2561..6b7d166 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -141,7 +141,9 @@
*/
static void scif_sercon_init(char *s)
{
+ struct uart_port *port = &scif_port;
unsigned baud = DEFAULT_BAUD;
+ unsigned int status;
char *e;
if (*s == ',')
@@ -160,19 +162,25 @@
baud = DEFAULT_BAUD;
}
- ctrl_outw(0, scif_port.mapbase + 8);
- ctrl_outw(0, scif_port.mapbase);
+ do {
+ status = sci_in(port, SCxSR);
+ } while (!(status & SCxSR_TEND(port)));
+
+ sci_out(port, SCSCR, 0); /* TE=0, RE=0 */
+ sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
+ sci_out(port, SCSMR, 0);
/* Set baud rate */
- ctrl_outb((CONFIG_SH_PCLK_FREQ + 16 * baud) /
- (32 * baud) - 1, scif_port.mapbase + 4);
+ sci_out(port, SCBRR, (CONFIG_SH_PCLK_FREQ + 16 * baud) /
+ (32 * baud) - 1);
+ udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
- ctrl_outw(12, scif_port.mapbase + 24);
- ctrl_outw(8, scif_port.mapbase + 24);
- ctrl_outw(0, scif_port.mapbase + 32);
- ctrl_outw(0x60, scif_port.mapbase + 16);
- ctrl_outw(0, scif_port.mapbase + 36);
- ctrl_outw(0x30, scif_port.mapbase + 8);
+ sci_out(port, SCSPTR, 0);
+ sci_out(port, SCxSR, 0x60);
+ sci_out(port, SCLSR, 0);
+
+ sci_out(port, SCFCR, 0);
+ sci_out(port, SCSCR, 0x30); /* TE=1, RE=1 */
}
#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */
#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 284f66f..516bde9 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -53,6 +53,7 @@
* sh_mv= on the command line, prior to .machvec.init teardown.
*/
struct sh_machine_vector sh_mv = { .mv_name = "generic", };
+EXPORT_SYMBOL(sh_mv);
#ifdef CONFIG_VT
struct screen_info screen_info;
@@ -76,11 +77,18 @@
.flags = IORESOURCE_BUSY | IORESOURCE_MEM,
};
+static struct resource bss_resource = {
+ .name = "Kernel bss",
+ .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
+};
+
unsigned long memory_start;
EXPORT_SYMBOL(memory_start);
unsigned long memory_end = 0;
EXPORT_SYMBOL(memory_end);
+static struct resource mem_resources[MAX_NUMNODES];
+
int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
static int __init early_parse_mem(char *p)
@@ -169,6 +177,40 @@
{}
#endif
+void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
+ unsigned long end_pfn)
+{
+ struct resource *res = &mem_resources[nid];
+
+ WARN_ON(res->name); /* max one active range per node for now */
+
+ res->name = "System RAM";
+ res->start = start_pfn << PAGE_SHIFT;
+ res->end = (end_pfn << PAGE_SHIFT) - 1;
+ res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
+ if (request_resource(&iomem_resource, res)) {
+ pr_err("unable to request memory_resource 0x%lx 0x%lx\n",
+ start_pfn, end_pfn);
+ return;
+ }
+
+ /*
+ * We don't know which RAM region contains kernel data,
+ * so we try it repeatedly and let the resource manager
+ * test it.
+ */
+ request_resource(res, &code_resource);
+ request_resource(res, &data_resource);
+ request_resource(res, &bss_resource);
+
+#ifdef CONFIG_KEXEC
+ if (crashk_res.start != crashk_res.end)
+ request_resource(res, &crashk_res);
+#endif
+
+ add_active_range(nid, start_pfn, end_pfn);
+}
+
void __init setup_bootmem_allocator(unsigned long free_pfn)
{
unsigned long bootmap_size;
@@ -181,7 +223,7 @@
bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn,
min_low_pfn, max_low_pfn);
- add_active_range(0, min_low_pfn, max_low_pfn);
+ __add_active_range(0, min_low_pfn, max_low_pfn);
register_bootmem_low_pages();
node_set_online(0);
@@ -267,6 +309,8 @@
code_resource.end = virt_to_phys(_etext)-1;
data_resource.start = virt_to_phys(_etext);
data_resource.end = virt_to_phys(_edata)-1;
+ bss_resource.start = virt_to_phys(__bss_start);
+ bss_resource.end = virt_to_phys(_ebss)-1;
memory_start = (unsigned long)__va(__MEMORY_START);
if (!memory_end)
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 6d40546..8f91653 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -20,8 +20,6 @@
extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
extern struct hw_interrupt_type no_irq_type;
-EXPORT_SYMBOL(sh_mv);
-
/* platform dependent support */
EXPORT_SYMBOL(dump_fpu);
EXPORT_SYMBOL(kernel_thread);
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index a310c97..9324d32 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -16,6 +16,7 @@
#include <linux/in6.h>
#include <linux/interrupt.h>
#include <linux/screen_info.h>
+#include <asm/cacheflush.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
#include <asm/checksum.h>
@@ -29,25 +30,50 @@
EXPORT_SYMBOL(dump_fpu);
EXPORT_SYMBOL(kernel_thread);
+#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU)
+EXPORT_SYMBOL(clear_user_page);
+#endif
+
+#ifndef CONFIG_CACHE_OFF
+EXPORT_SYMBOL(flush_dcache_page);
+#endif
+
/* Networking helper routines. */
+EXPORT_SYMBOL(csum_partial);
EXPORT_SYMBOL(csum_partial_copy_nocheck);
+#ifdef CONFIG_IPV6
+EXPORT_SYMBOL(csum_ipv6_magic);
+#endif
#ifdef CONFIG_VT
EXPORT_SYMBOL(screen_info);
#endif
+EXPORT_SYMBOL(__put_user_asm_b);
+EXPORT_SYMBOL(__put_user_asm_w);
EXPORT_SYMBOL(__put_user_asm_l);
+EXPORT_SYMBOL(__put_user_asm_q);
+EXPORT_SYMBOL(__get_user_asm_b);
+EXPORT_SYMBOL(__get_user_asm_w);
EXPORT_SYMBOL(__get_user_asm_l);
+EXPORT_SYMBOL(__get_user_asm_q);
+EXPORT_SYMBOL(__strnlen_user);
+EXPORT_SYMBOL(__strncpy_from_user);
+EXPORT_SYMBOL(clear_page);
+EXPORT_SYMBOL(__clear_user);
EXPORT_SYMBOL(copy_page);
EXPORT_SYMBOL(__copy_user);
EXPORT_SYMBOL(empty_zero_page);
EXPORT_SYMBOL(memcpy);
EXPORT_SYMBOL(__udelay);
EXPORT_SYMBOL(__ndelay);
+EXPORT_SYMBOL(__const_udelay);
/* Ugh. These come in from libgcc.a at link time. */
#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
DECLARE_EXPORT(__sdivsi3);
+DECLARE_EXPORT(__sdivsi3_2);
DECLARE_EXPORT(__muldi3);
DECLARE_EXPORT(__udivsi3);
+DECLARE_EXPORT(__div_table);
diff --git a/arch/sh/kernel/time_64.c b/arch/sh/kernel/time_64.c
index 898977e..022a55f 100644
--- a/arch/sh/kernel/time_64.c
+++ b/arch/sh/kernel/time_64.c
@@ -172,6 +172,7 @@
tv->tv_sec = sec;
tv->tv_usec = usec;
}
+EXPORT_SYMBOL(do_gettimeofday);
int do_settimeofday(struct timespec *tv)
{
@@ -240,7 +241,7 @@
* the irq version of write_lock because as just said we have irq
* locally disabled. -arca
*/
- write_lock(&xtime_lock);
+ write_seqlock(&xtime_lock);
asm ("getcon cr62, %0" : "=r" (current_ctc));
ctc_last_interrupt = (unsigned long) current_ctc;
@@ -266,7 +267,7 @@
/* do it again in 60 s */
last_rtc_update = xtime.tv_sec - 600;
}
- write_unlock(&xtime_lock);
+ write_sequnlock(&xtime_lock);
#ifndef CONFIG_SMP
update_process_times(user_mode(get_irq_regs()));
diff --git a/arch/sh/lib64/dbg.c b/arch/sh/lib64/dbg.c
index 75825ef..2fb8eaf 100644
--- a/arch/sh/lib64/dbg.c
+++ b/arch/sh/lib64/dbg.c
@@ -186,8 +186,8 @@
rr->pc = regs->pc;
if (sp < stack_bottom + 3092) {
- printk("evt_debug : stack underflow report\n");
int i, j;
+ printk("evt_debug : stack underflow report\n");
for (j=0, i = event_ptr; j<16; j++) {
rr = event_ring + i;
printk("evt=%08x event=%08x tra=%08x pid=%5d sp=%08lx pc=%08lx\n",
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64
index cbd6aa3..0d92a8a 100644
--- a/arch/sh/mm/Makefile_64
+++ b/arch/sh/mm/Makefile_64
@@ -2,10 +2,11 @@
# Makefile for the Linux SuperH-specific parts of the memory manager.
#
-obj-y := init.o extable_64.o consistent.o
+obj-y := init.o consistent.o
-mmu-y := tlb-nommu.o pg-nommu.o
-mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o
+mmu-y := tlb-nommu.o pg-nommu.o extable_32.o
+mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o \
+ extable_64.o
ifndef CONFIG_CACHE_OFF
obj-y += cache-sh5.o
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c
index 3877321..9e277ec 100644
--- a/arch/sh/mm/cache-sh5.c
+++ b/arch/sh/mm/cache-sh5.c
@@ -714,6 +714,7 @@
sh64_icache_inv_current_user_range(vaddr, end);
}
+#ifdef CONFIG_MMU
/*
* These *MUST* lie in an area of virtual address space that's otherwise
* unused.
@@ -830,3 +831,4 @@
else
sh64_clear_user_page_coloured(to, address);
}
+#endif
diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c
index cea224c..6e0be24 100644
--- a/arch/sh/mm/ioremap_64.c
+++ b/arch/sh/mm/ioremap_64.c
@@ -343,6 +343,7 @@
return shmedia_alloc_io(phys, size, name);
}
+EXPORT_SYMBOL(onchip_remap);
void onchip_unmap(unsigned long vaddr)
{
@@ -370,6 +371,7 @@
kfree(res);
}
}
+EXPORT_SYMBOL(onchip_unmap);
#ifdef CONFIG_PROC_FS
static int
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c
index 2de7302..1663199 100644
--- a/arch/sh/mm/numa.c
+++ b/arch/sh/mm/numa.c
@@ -59,7 +59,7 @@
free_pfn = start_pfn = start >> PAGE_SHIFT;
end_pfn = end >> PAGE_SHIFT;
- add_active_range(nid, start_pfn, end_pfn);
+ __add_active_range(nid, start_pfn, end_pfn);
/* Node-local pgdat */
NODE_DATA(nid) = pfn_to_kaddr(free_pfn);
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 987c668..1bba7d3 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -28,7 +28,6 @@
7751SYSTEMH SH_7751_SYSTEMH
HP6XX SH_HP6XX
DREAMCAST SH_DREAMCAST
-MPC1211 SH_MPC1211
SNAPGEAR SH_SECUREEDGE5410
EDOSK7705 SH_EDOSK7705
SH4202_MICRODEV SH_SH4202_MICRODEV
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index bbcafaa..fe361ae 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -335,6 +335,7 @@
select GENERIC_GPIO
select LEDS_CLASS
select LEDS_GPIO
+ select NEW_LEDS
help
This option is needed for RDC R-321x system-on-chip, also known
as R-8610-(G).
@@ -1662,7 +1663,6 @@
config OLPC
bool "One Laptop Per Child support"
- depends on MGEODE_LX
default n
help
Add support for detecting the unique features of the OLPC
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 238468a..c2e1ce3 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -6,6 +6,7 @@
#include <linux/cpu.h>
+#include <asm/pat.h>
#include <asm/processor.h>
struct cpuid_bit {
@@ -48,3 +49,23 @@
set_cpu_cap(c, cb->feature);
}
}
+
+#ifdef CONFIG_X86_PAT
+void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
+{
+ switch (c->x86_vendor) {
+ case X86_VENDOR_AMD:
+ if (c->x86 >= 0xf && c->x86 <= 0x11)
+ return;
+ break;
+ case X86_VENDOR_INTEL:
+ if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+ return;
+ break;
+ }
+
+ pat_disable(cpu_has_pat ?
+ "PAT disabled. Not yet verified on this CPU type." :
+ "PAT not supported by CPU.");
+}
+#endif
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 35b4f6a..d0463a9 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -12,6 +12,7 @@
#include <asm/mmu_context.h>
#include <asm/mtrr.h>
#include <asm/mce.h>
+#include <asm/pat.h>
#ifdef CONFIG_X86_LOCAL_APIC
#include <asm/mpspec.h>
#include <asm/apic.h>
@@ -308,19 +309,6 @@
}
- clear_cpu_cap(c, X86_FEATURE_PAT);
-
- switch (c->x86_vendor) {
- case X86_VENDOR_AMD:
- if (c->x86 >= 0xf && c->x86 <= 0x11)
- set_cpu_cap(c, X86_FEATURE_PAT);
- break;
- case X86_VENDOR_INTEL:
- if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
- set_cpu_cap(c, X86_FEATURE_PAT);
- break;
- }
-
}
/*
@@ -409,18 +397,6 @@
init_scattered_cpuid_features(c);
}
- clear_cpu_cap(c, X86_FEATURE_PAT);
-
- switch (c->x86_vendor) {
- case X86_VENDOR_AMD:
- if (c->x86 >= 0xf && c->x86 <= 0x11)
- set_cpu_cap(c, X86_FEATURE_PAT);
- break;
- case X86_VENDOR_INTEL:
- if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
- set_cpu_cap(c, X86_FEATURE_PAT);
- break;
- }
}
static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
@@ -651,6 +627,7 @@
cpu_devs[cvdev->vendor] = cvdev->cpu_dev;
early_cpu_detect();
+ validate_pat_support(&boot_cpu_data);
}
/* Make sure %fs is initialized properly in idle threads */
diff --git a/arch/x86/kernel/geode_32.c b/arch/x86/kernel/geode_32.c
index 9dad6ca..e8edd63 100644
--- a/arch/x86/kernel/geode_32.c
+++ b/arch/x86/kernel/geode_32.c
@@ -161,6 +161,25 @@
}
EXPORT_SYMBOL_GPL(geode_gpio_setup_event);
+int geode_has_vsa2(void)
+{
+ static int has_vsa2 = -1;
+
+ if (has_vsa2 == -1) {
+ /*
+ * The VSA has virtual registers that we can query for a
+ * signature.
+ */
+ outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
+ outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
+
+ has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG);
+ }
+
+ return has_vsa2;
+}
+EXPORT_SYMBOL_GPL(geode_has_vsa2);
+
static int __init geode_southbridge_init(void)
{
if (!is_geode())
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index db6839b..e03cc95 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -450,7 +450,6 @@
{
struct task_struct *tsk = current;
- clear_fpu(tsk);
return __copy_from_user(&tsk->thread.xstate->fsave, buf,
sizeof(struct i387_fsave_struct));
}
@@ -461,7 +460,6 @@
struct user_i387_ia32_struct env;
int err;
- clear_fpu(tsk);
err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
sizeof(struct i387_fxsave_struct));
/* mxcsr reserved bits must be masked to zero for security reasons */
@@ -478,6 +476,16 @@
int err;
if (HAVE_HWFP) {
+ struct task_struct *tsk = current;
+
+ clear_fpu(tsk);
+
+ if (!used_math()) {
+ err = init_fpu(tsk);
+ if (err)
+ return err;
+ }
+
if (cpu_has_fxsr)
err = restore_i387_fxsave(buf);
else
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index cc6f5eb..c0c68c1 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -95,7 +95,7 @@
/* Copy section for each CPU (we discard the original) */
size = PERCPU_ENOUGH_ROOM;
- printk(KERN_INFO "PERCPU: Allocating %zd bytes of per cpu data\n",
+ printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n",
size);
for_each_possible_cpu(i) {
diff --git a/arch/x86/kernel/setup_32.c b/arch/x86/kernel/setup_32.c
index 2283422..2c5f8b2 100644
--- a/arch/x86/kernel/setup_32.c
+++ b/arch/x86/kernel/setup_32.c
@@ -127,7 +127,12 @@
}, {
.name = "keyboard",
.start = 0x0060,
- .end = 0x006f,
+ .end = 0x0060,
+ .flags = IORESOURCE_BUSY | IORESOURCE_IO
+}, {
+ .name = "keyboard",
+ .start = 0x0064,
+ .end = 0x0064,
.flags = IORESOURCE_BUSY | IORESOURCE_IO
}, {
.name = "dma page reg",
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index 22c14e2..f2fc8fe 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -70,6 +70,7 @@
#include <asm/ds.h>
#include <asm/topology.h>
#include <asm/trampoline.h>
+#include <asm/pat.h>
#include <mach_apic.h>
#ifdef CONFIG_PARAVIRT
@@ -128,7 +129,9 @@
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
{ .name = "timer1", .start = 0x50, .end = 0x53,
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
- { .name = "keyboard", .start = 0x60, .end = 0x6f,
+ { .name = "keyboard", .start = 0x60, .end = 0x60,
+ .flags = IORESOURCE_BUSY | IORESOURCE_IO },
+ { .name = "keyboard", .start = 0x64, .end = 0x64,
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
{ .name = "dma page reg", .start = 0x80, .end = 0x8f,
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
@@ -1063,25 +1066,19 @@
if (c->extended_cpuid_level >= 0x80000007)
c->x86_power = cpuid_edx(0x80000007);
-
- clear_cpu_cap(c, X86_FEATURE_PAT);
-
switch (c->x86_vendor) {
case X86_VENDOR_AMD:
early_init_amd(c);
- if (c->x86 >= 0xf && c->x86 <= 0x11)
- set_cpu_cap(c, X86_FEATURE_PAT);
break;
case X86_VENDOR_INTEL:
early_init_intel(c);
- if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
- set_cpu_cap(c, X86_FEATURE_PAT);
break;
case X86_VENDOR_CENTAUR:
early_init_centaur(c);
break;
}
+ validate_pat_support(c);
}
/*
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 277446c..60adbe2 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -25,31 +25,24 @@
#include <asm/mtrr.h>
#include <asm/io.h>
-int pat_wc_enabled = 1;
+#ifdef CONFIG_X86_PAT
+int __read_mostly pat_wc_enabled = 1;
-static u64 __read_mostly boot_pat_state;
+void __init pat_disable(char *reason)
+{
+ pat_wc_enabled = 0;
+ printk(KERN_INFO "%s\n", reason);
+}
static int nopat(char *str)
{
- pat_wc_enabled = 0;
- printk(KERN_INFO "x86: PAT support disabled.\n");
-
+ pat_disable("PAT support disabled.");
return 0;
}
early_param("nopat", nopat);
+#endif
-static int pat_known_cpu(void)
-{
- if (!pat_wc_enabled)
- return 0;
-
- if (cpu_has_pat)
- return 1;
-
- pat_wc_enabled = 0;
- printk(KERN_INFO "CPU and/or kernel does not support PAT.\n");
- return 0;
-}
+static u64 __read_mostly boot_pat_state;
enum {
PAT_UC = 0, /* uncached */
@@ -66,17 +59,19 @@
{
u64 pat;
-#ifndef CONFIG_X86_PAT
- nopat(NULL);
-#endif
-
- /* Boot CPU enables PAT based on CPU feature */
- if (!smp_processor_id() && !pat_known_cpu())
+ if (!pat_wc_enabled)
return;
- /* APs enable PAT iff boot CPU has enabled it before */
- if (smp_processor_id() && !pat_wc_enabled)
- return;
+ /* Paranoia check. */
+ if (!cpu_has_pat) {
+ printk(KERN_ERR "PAT enabled, but CPU feature cleared\n");
+ /*
+ * Panic if this happens on the secondary CPU, and we
+ * switched to PAT on the boot CPU. We have no way to
+ * undo PAT.
+ */
+ BUG_ON(boot_pat_state);
+ }
/* Set PWT to Write-Combining. All other bits stay the same */
/*
@@ -95,9 +90,8 @@
PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC);
/* Boot CPU check */
- if (!smp_processor_id()) {
+ if (!boot_pat_state)
rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
- }
wrmsrl(MSR_IA32_CR_PAT, pat);
printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
diff --git a/arch/x86/pci/k8-bus_64.c b/arch/x86/pci/k8-bus_64.c
index ab6d4b1..5c2799c 100644
--- a/arch/x86/pci/k8-bus_64.c
+++ b/arch/x86/pci/k8-bus_64.c
@@ -504,14 +504,6 @@
}
}
-#ifdef CONFIG_NUMA
- for (i = 0; i < BUS_NR; i++) {
- node = mp_bus_to_node[i];
- if (node >= 0)
- printk(KERN_DEBUG "bus: %02x to node: %02x\n", i, node);
- }
-#endif
-
for (i = 0; i < pci_root_num; i++) {
int res_num;
int busnum;
diff --git a/crypto/hmac.c b/crypto/hmac.c
index b60c3c7..14c6351 100644
--- a/crypto/hmac.c
+++ b/crypto/hmac.c
@@ -57,14 +57,35 @@
if (keylen > bs) {
struct hash_desc desc;
struct scatterlist tmp;
+ int tmplen;
int err;
desc.tfm = tfm;
desc.flags = crypto_hash_get_flags(parent);
desc.flags &= CRYPTO_TFM_REQ_MAY_SLEEP;
- sg_init_one(&tmp, inkey, keylen);
- err = crypto_hash_digest(&desc, &tmp, keylen, digest);
+ err = crypto_hash_init(&desc);
+ if (err)
+ return err;
+
+ tmplen = bs * 2 + ds;
+ sg_init_one(&tmp, ipad, tmplen);
+
+ for (; keylen > tmplen; inkey += tmplen, keylen -= tmplen) {
+ memcpy(ipad, inkey, tmplen);
+ err = crypto_hash_update(&desc, &tmp, tmplen);
+ if (err)
+ return err;
+ }
+
+ if (keylen) {
+ memcpy(ipad, inkey, keylen);
+ err = crypto_hash_update(&desc, &tmp, keylen);
+ if (err)
+ return err;
+ }
+
+ err = crypto_hash_final(&desc, digest);
if (err)
return err;
diff --git a/drivers/input/serio/i8042-io.h b/drivers/input/serio/i8042-io.h
index 3b4e13b..f451c73 100644
--- a/drivers/input/serio/i8042-io.h
+++ b/drivers/input/serio/i8042-io.h
@@ -25,7 +25,7 @@
#elif defined(__arm__)
/* defined in include/asm-arm/arch-xxx/irqs.h */
#include <asm/irq.h>
-#elif defined(CONFIG_SUPERH64)
+#elif defined(CONFIG_SH_CAYMAN)
#include <asm/irq.h>
#else
# define I8042_KBD_IRQ 1
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 1bd69aa..17bc87a 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -374,7 +374,7 @@
config MTD_SOLUTIONENGINE
tristate "CFI Flash device mapped on Hitachi SolutionEngine"
- depends on SUPERH && MTD_CFI && MTD_REDBOOT_PARTS
+ depends on SUPERH && SOLUTION_ENGINE && MTD_CFI && MTD_REDBOOT_PARTS
help
This enables access to the flash chips on the Hitachi SolutionEngine and
similar boards. Say 'Y' if you are building a kernel for such a board.
@@ -480,13 +480,6 @@
This enables access to the flash chips on the Hynix evaluation boards.
If you have such a board, say 'Y'.
-config MTD_MPC1211
- tristate "CFI Flash device mapped on Interface MPC-1211"
- depends on SH_MPC1211 && MTD_CFI
- help
- This enables access to the flash chips on the Interface MPC-1211(CTP/PCI/MPC-SH02).
- If you have such a board, say 'Y'.
-
config MTD_OMAP_NOR
tristate "TI OMAP board mappings"
depends on MTD_CFI && ARCH_OMAP
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index a9cbe80..957fb5f 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -58,7 +58,6 @@
obj-$(CONFIG_MTD_H720X) += h720x-flash.o
obj-$(CONFIG_MTD_SBC8240) += sbc8240.o
obj-$(CONFIG_MTD_NOR_TOTO) += omap-toto-flash.o
-obj-$(CONFIG_MTD_MPC1211) += mpc1211.o
obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o
obj-$(CONFIG_MTD_IXP2000) += ixp2000.o
obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o
diff --git a/drivers/mtd/maps/mpc1211.c b/drivers/mtd/maps/mpc1211.c
deleted file mode 100644
index 45a00fa..0000000
--- a/drivers/mtd/maps/mpc1211.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Flash on MPC-1211
- *
- * $Id: mpc1211.c,v 1.4 2004/09/16 23:27:13 gleixner Exp $
- *
- * (C) 2002 Interface, Saito.K & Jeanne
- *
- * GPL'd
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <asm/io.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/partitions.h>
-
-static struct mtd_info *flash_mtd;
-static struct mtd_partition *parsed_parts;
-
-struct map_info mpc1211_flash_map = {
- .name = "MPC-1211 FLASH",
- .size = 0x80000,
- .bankwidth = 1,
-};
-
-static struct mtd_partition mpc1211_partitions[] = {
- {
- .name = "IPL & ETH-BOOT",
- .offset = 0x00000000,
- .size = 0x10000,
- },
- {
- .name = "Flash FS",
- .offset = 0x00010000,
- .size = MTDPART_SIZ_FULL,
- }
-};
-
-static int __init init_mpc1211_maps(void)
-{
- int nr_parts;
-
- mpc1211_flash_map.phys = 0;
- mpc1211_flash_map.virt = (void __iomem *)P2SEGADDR(0);
-
- simple_map_init(&mpc1211_flash_map);
-
- printk(KERN_NOTICE "Probing for flash chips at 0x00000000:\n");
- flash_mtd = do_map_probe("jedec_probe", &mpc1211_flash_map);
- if (!flash_mtd) {
- printk(KERN_NOTICE "Flash chips not detected at either possible location.\n");
- return -ENXIO;
- }
- printk(KERN_NOTICE "MPC-1211: Flash at 0x%08lx\n", mpc1211_flash_map.virt & 0x1fffffff);
- flash_mtd->module = THIS_MODULE;
-
- parsed_parts = mpc1211_partitions;
- nr_parts = ARRAY_SIZE(mpc1211_partitions);
-
- add_mtd_partitions(flash_mtd, parsed_parts, nr_parts);
- return 0;
-}
-
-static void __exit cleanup_mpc1211_maps(void)
-{
- if (parsed_parts)
- del_mtd_partitions(flash_mtd);
- else
- del_mtd_device(flash_mtd);
- map_destroy(flash_mtd);
-}
-
-module_init(init_mpc1211_maps);
-module_exit(cleanup_mpc1211_maps);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Saito.K & Jeanne <ksaito@interface.co.jp>");
-MODULE_DESCRIPTION("MTD map driver for MPC-1211 boards. Interface");
diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c
index 110699b..1f88e9e 100644
--- a/drivers/rtc/rtc-sh.c
+++ b/drivers/rtc/rtc-sh.c
@@ -616,7 +616,7 @@
goto err_badres;
}
- rtc->regbase = (void __iomem *)rtc->res->start;
+ rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
if (unlikely(!rtc->regbase)) {
ret = -EINVAL;
goto err_badmap;
@@ -626,7 +626,7 @@
&sh_rtc_ops, THIS_MODULE);
if (IS_ERR(rtc->rtc_dev)) {
ret = PTR_ERR(rtc->rtc_dev);
- goto err_badmap;
+ goto err_unmap;
}
rtc->capabilities = RTC_DEF_CAPABILITIES;
@@ -653,7 +653,7 @@
dev_err(&pdev->dev,
"request period IRQ failed with %d, IRQ %d\n", ret,
rtc->periodic_irq);
- goto err_badmap;
+ goto err_unmap;
}
ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED,
@@ -663,7 +663,7 @@
"request carry IRQ failed with %d, IRQ %d\n", ret,
rtc->carry_irq);
free_irq(rtc->periodic_irq, rtc);
- goto err_badmap;
+ goto err_unmap;
}
ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED,
@@ -674,7 +674,7 @@
rtc->alarm_irq);
free_irq(rtc->carry_irq, rtc);
free_irq(rtc->periodic_irq, rtc);
- goto err_badmap;
+ goto err_unmap;
}
tmp = readb(rtc->regbase + RCR1);
@@ -684,6 +684,8 @@
return 0;
+err_unmap:
+ iounmap(rtc->regbase);
err_badmap:
release_resource(rtc->res);
err_badres:
@@ -708,6 +710,8 @@
release_resource(rtc->res);
+ iounmap(rtc->regbase);
+
platform_set_drvdata(pdev, NULL);
kfree(rtc);
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c
index 8a2f6a1..d6b4ead 100644
--- a/drivers/serial/bfin_5xx.c
+++ b/drivers/serial/bfin_5xx.c
@@ -65,9 +65,6 @@
{
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
struct circ_buf *xmit = &uart->port.info->xmit;
-#if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
- unsigned short ier;
-#endif
while (!(UART_GET_LSR(uart) & TEMT))
cpu_relax();
@@ -82,12 +79,8 @@
#ifdef CONFIG_BF54x
/* Clear TFI bit */
UART_PUT_LSR(uart, TFI);
- UART_CLEAR_IER(uart, ETBEI);
-#else
- ier = UART_GET_IER(uart);
- ier &= ~ETBEI;
- UART_PUT_IER(uart, ier);
#endif
+ UART_CLEAR_IER(uart, ETBEI);
#endif
}
@@ -102,14 +95,7 @@
if (uart->tx_done)
bfin_serial_dma_tx_chars(uart);
#else
-#ifdef CONFIG_BF54x
UART_SET_IER(uart, ETBEI);
-#else
- unsigned short ier;
- ier = UART_GET_IER(uart);
- ier |= ETBEI;
- UART_PUT_IER(uart, ier);
-#endif
bfin_serial_tx_chars(uart);
#endif
}
@@ -120,21 +106,10 @@
static void bfin_serial_stop_rx(struct uart_port *port)
{
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
-#ifdef CONFIG_KGDB_UART
- if (uart->port.line != CONFIG_KGDB_UART_PORT) {
+#ifdef CONFIG_KGDB_UART
+ if (uart->port.line != CONFIG_KGDB_UART_PORT)
#endif
-#ifdef CONFIG_BF54x
UART_CLEAR_IER(uart, ERBFI);
-#else
- unsigned short ier;
-
- ier = UART_GET_IER(uart);
- ier &= ~ERBFI;
- UART_PUT_IER(uart, ier);
-#endif
-#ifdef CONFIG_KGDB_UART
- }
-#endif
}
/*
@@ -161,10 +136,7 @@
SSYNC();
}
-#ifndef CONFIG_BF54x
- UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
- SSYNC();
-#endif
+ UART_CLEAR_DLAB(uart);
UART_PUT_CHAR(uart, (unsigned char)chr);
SSYNC();
}
@@ -183,10 +155,7 @@
while(!(UART_GET_LSR(uart) & DR)) {
SSYNC();
}
-#ifndef CONFIG_BF54x
- UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
- SSYNC();
-#endif
+ UART_CLEAR_DLAB(uart);
chr = UART_GET_CHAR(uart);
SSYNC();
@@ -208,9 +177,6 @@
struct tty_struct *tty = uart->port.info->tty;
unsigned int status, ch, flg;
static struct timeval anomaly_start = { .tv_sec = 0 };
-#ifdef CONFIG_KGDB_UART
- struct pt_regs *regs = get_irq_regs();
-#endif
status = UART_GET_LSR(uart);
UART_CLEAR_LSR(uart);
@@ -220,6 +186,7 @@
#ifdef CONFIG_KGDB_UART
if (uart->port.line == CONFIG_KGDB_UART_PORT) {
+ struct pt_regs *regs = get_irq_regs();
if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
kgdb_breakkey_pressed(regs);
return;
@@ -391,7 +358,6 @@
static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
{
struct circ_buf *xmit = &uart->port.info->xmit;
- unsigned short ier;
uart->tx_done = 0;
@@ -429,13 +395,7 @@
set_dma_x_modify(uart->tx_dma_channel, 1);
enable_dma(uart->tx_dma_channel);
-#ifdef CONFIG_BF54x
UART_SET_IER(uart, ETBEI);
-#else
- ier = UART_GET_IER(uart);
- ier |= ETBEI;
- UART_PUT_IER(uart, ier);
-#endif
}
static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
@@ -513,19 +473,12 @@
{
struct bfin_serial_port *uart = dev_id;
struct circ_buf *xmit = &uart->port.info->xmit;
- unsigned short ier;
spin_lock(&uart->port.lock);
if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
disable_dma(uart->tx_dma_channel);
clear_dma_irqstat(uart->tx_dma_channel);
-#ifdef CONFIG_BF54x
UART_CLEAR_IER(uart, ETBEI);
-#else
- ier = UART_GET_IER(uart);
- ier &= ~ETBEI;
- UART_PUT_IER(uart, ier);
-#endif
xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
uart->port.icount.tx += uart->tx_count;
@@ -701,7 +654,6 @@
# endif
}
-
if (request_irq
(uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
"BFIN_UART_TX", uart)) {
@@ -710,11 +662,7 @@
return -EBUSY;
}
#endif
-#ifdef CONFIG_BF54x
UART_SET_IER(uart, ERBFI);
-#else
- UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
-#endif
return 0;
}
@@ -810,26 +758,15 @@
UART_PUT_IER(uart, 0);
#endif
-#ifndef CONFIG_BF54x
/* Set DLAB in LCR to Access DLL and DLH */
- val = UART_GET_LCR(uart);
- val |= DLAB;
- UART_PUT_LCR(uart, val);
- SSYNC();
-#endif
+ UART_SET_DLAB(uart);
UART_PUT_DLL(uart, quot & 0xFF);
- SSYNC();
UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
SSYNC();
-#ifndef CONFIG_BF54x
/* Clear DLAB in LCR to Access THR RBR IER */
- val = UART_GET_LCR(uart);
- val &= ~DLAB;
- UART_PUT_LCR(uart, val);
- SSYNC();
-#endif
+ UART_CLEAR_DLAB(uart);
UART_PUT_LCR(uart, lcr);
@@ -992,8 +929,7 @@
status = UART_GET_IER(uart) & (ERBFI | ETBEI);
if (status == (ERBFI | ETBEI)) {
/* ok, the port was enabled */
- unsigned short lcr, val;
- unsigned short dlh, dll;
+ u16 lcr, dlh, dll;
lcr = UART_GET_LCR(uart);
@@ -1010,22 +946,14 @@
case 2: *bits = 7; break;
case 3: *bits = 8; break;
}
-#ifndef CONFIG_BF54x
/* Set DLAB in LCR to Access DLL and DLH */
- val = UART_GET_LCR(uart);
- val |= DLAB;
- UART_PUT_LCR(uart, val);
-#endif
+ UART_SET_DLAB(uart);
dll = UART_GET_DLL(uart);
dlh = UART_GET_DLH(uart);
-#ifndef CONFIG_BF54x
/* Clear DLAB in LCR to Access THR RBR IER */
- val = UART_GET_LCR(uart);
- val &= ~DLAB;
- UART_PUT_LCR(uart, val);
-#endif
+ UART_CLEAR_DLAB(uart);
*baud = get_sclk() / (16*(dll | dlh << 8));
}
@@ -1290,11 +1218,7 @@
request_irq(uart->port.irq, bfin_serial_rx_int,
IRQF_DISABLED, "BFIN_UART_RX", uart);
pr_info("Request irq for kgdb uart port\n");
-#ifdef CONFIG_BF54x
UART_SET_IER(uart, ERBFI);
-#else
- UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
-#endif
SSYNC();
t.c_cflag = CS8|B57600;
t.c_iflag = 0;
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 9691061..8fdafc2 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -42,14 +42,12 @@
#include <linux/console.h>
#include <linux/platform_device.h>
#include <linux/serial_sci.h>
-
-#ifdef CONFIG_CPU_FREQ
#include <linux/notifier.h>
#include <linux/cpufreq.h>
-#endif
-
-#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
+#include <linux/clk.h>
#include <linux/ctype.h>
+
+#ifdef CONFIG_SUPERH
#include <asm/clock.h>
#include <asm/sh_bios.h>
#include <asm/kgdb.h>
@@ -80,7 +78,7 @@
struct timer_list break_timer;
int break_flag;
-#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
+#ifdef CONFIG_SUPERH
/* Port clock */
struct clk *clk;
#endif
@@ -365,21 +363,19 @@
static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
{
unsigned int fcr_val = 0;
+ unsigned short data;
- if (cflag & CRTSCTS) {
- fcr_val |= SCFCR_MCE;
+ if (port->mapbase == 0xffe00000) {
+ data = ctrl_inw(PSCR);
+ data &= ~0x03cf;
+ if (cflag & CRTSCTS)
+ fcr_val |= SCFCR_MCE;
+ else
+ data |= 0x0340;
- ctrl_outw(0x0000, PORT_PSCR);
- } else {
- unsigned short data;
-
- data = ctrl_inw(PORT_PSCR);
- data &= 0x033f;
- data |= 0x0400;
- ctrl_outw(data, PORT_PSCR);
-
- ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0);
+ ctrl_outw(data, PSCR);
}
+ /* SCIF1 and SCIF2 should be setup by board code */
sci_out(port, SCFCR, fcr_val);
}
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index fa8700a..eb84833 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -76,12 +76,13 @@
# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */
# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
-# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */
-# define SCSPTR0 SCPDR0
+# define PADR 0xA4050120
+# define PSDR 0xA405013e
+# define PWDR 0xA4050166
+# define PSCR 0xA405011E
# define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
# define SCIF_ONLY
-# define PORT_PSCR 0xA405011E
#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */
# define SCSPTR0 SCPDR0
@@ -320,7 +321,7 @@
unsigned int addr = port->mapbase + (offset); \
if ((size) == 8) { \
ctrl_outb(value, addr); \
- } else { \
+ } else if ((size) == 16) { \
ctrl_outw(value, addr); \
}
@@ -451,7 +452,11 @@
SCIF_FNS(SCLSR, 0, 0, 0x28, 16)
#else
SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
+#if defined(CONFIG_CPU_SUBTYPE_SH7722)
+SCIF_FNS(SCSPTR, 0, 0, 0, 0)
+#else
SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
+#endif
SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
#endif
#endif
@@ -593,13 +598,25 @@
return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
return 1;
}
-#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366)
+#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
static inline int sci_rxd_in(struct uart_port *port)
{
if (port->mapbase == 0xffe00000)
return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */
return 1;
}
+#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
+static inline int sci_rxd_in(struct uart_port *port)
+{
+ if (port->mapbase == 0xffe00000)
+ return ctrl_inb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */
+ if (port->mapbase == 0xffe10000)
+ return ctrl_inb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */
+ if (port->mapbase == 0xffe20000)
+ return ctrl_inb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */
+
+ return 1;
+}
#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
static inline int sci_rxd_in(struct uart_port *port)
{
diff --git a/fs/cifs/CHANGES b/fs/cifs/CHANGES
index 05c9da6..8355e91 100644
--- a/fs/cifs/CHANGES
+++ b/fs/cifs/CHANGES
@@ -1,3 +1,6 @@
+Version 1.53
+------------
+
Version 1.52
------------
Fix oops on second mount to server when null auth is used.
diff --git a/fs/cifs/asn1.c b/fs/cifs/asn1.c
index bcda2c6..cb52cbb 100644
--- a/fs/cifs/asn1.c
+++ b/fs/cifs/asn1.c
@@ -460,8 +460,8 @@
unsigned char *sequence_end;
unsigned long *oid = NULL;
unsigned int cls, con, tag, oidlen, rc;
- int use_ntlmssp = FALSE;
- int use_kerberos = FALSE;
+ bool use_ntlmssp = false;
+ bool use_kerberos = false;
*secType = NTLM; /* BB eventually make Kerberos or NLTMSSP the default*/
@@ -561,15 +561,15 @@
if (compare_oid(oid, oidlen,
MSKRB5_OID,
MSKRB5_OID_LEN))
- use_kerberos = TRUE;
+ use_kerberos = true;
else if (compare_oid(oid, oidlen,
KRB5_OID,
KRB5_OID_LEN))
- use_kerberos = TRUE;
+ use_kerberos = true;
else if (compare_oid(oid, oidlen,
NTLMSSP_OID,
NTLMSSP_OID_LEN))
- use_ntlmssp = TRUE;
+ use_ntlmssp = true;
kfree(oid);
}
diff --git a/fs/cifs/cifs_dfs_ref.c b/fs/cifs/cifs_dfs_ref.c
index 95024c0..f6fdecf 100644
--- a/fs/cifs/cifs_dfs_ref.c
+++ b/fs/cifs/cifs_dfs_ref.c
@@ -93,15 +93,11 @@
/* find sharename end */
pSep++;
pSep = memchr(UNC+(pSep-UNC), '\\', len-(pSep-UNC));
- if (!pSep) {
- cERROR(1, ("%s:2 cant find share name in node name: %s",
- __func__, node_name));
- kfree(UNC);
- return NULL;
+ if (pSep) {
+ /* trim path up to sharename end
+ * now we have share name in UNC */
+ *pSep = 0;
}
- /* trim path up to sharename end
- * * now we have share name in UNC */
- *pSep = 0;
return UNC;
}
@@ -188,7 +184,7 @@
tkn_e = strchr(tkn_e+1, '\\');
if (tkn_e) {
strcat(mountdata, ",prefixpath=");
- strcat(mountdata, tkn_e);
+ strcat(mountdata, tkn_e+1);
}
}
@@ -244,7 +240,8 @@
return NULL;
if (cifs_sb->tcon->Flags & SMB_SHARE_IS_IN_DFS) {
- /* we should use full path name to correct working with DFS */
+ int i;
+ /* we should use full path name for correct working with DFS */
l_max_len = strnlen(cifs_sb->tcon->treeName, MAX_TREE_SIZE+1) +
strnlen(search_path, MAX_PATHCONF) + 1;
tmp_path = kmalloc(l_max_len, GFP_KERNEL);
@@ -253,8 +250,14 @@
return NULL;
}
strncpy(tmp_path, cifs_sb->tcon->treeName, l_max_len);
- strcat(tmp_path, search_path);
tmp_path[l_max_len-1] = 0;
+ if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_POSIX_PATHS)
+ for (i = 0; i < l_max_len; i++) {
+ if (tmp_path[i] == '\\')
+ tmp_path[i] = '/';
+ }
+ strncat(tmp_path, search_path, l_max_len - strlen(tmp_path));
+
full_path = tmp_path;
kfree(search_path);
} else {
diff --git a/fs/cifs/cifsacl.c b/fs/cifs/cifsacl.c
index e99d4fa..34902cf 100644
--- a/fs/cifs/cifsacl.c
+++ b/fs/cifs/cifsacl.c
@@ -559,7 +559,7 @@
const char *path, const __u16 *pfid)
{
struct cifsFileInfo *open_file = NULL;
- int unlock_file = FALSE;
+ bool unlock_file = false;
int xid;
int rc = -EIO;
__u16 fid;
@@ -586,10 +586,10 @@
cifs_sb = CIFS_SB(sb);
if (open_file) {
- unlock_file = TRUE;
+ unlock_file = true;
fid = open_file->netfid;
} else if (pfid == NULL) {
- int oplock = FALSE;
+ int oplock = 0;
/* open file */
rc = CIFSSMBOpen(xid, cifs_sb->tcon, path, FILE_OPEN,
READ_CONTROL, 0, &fid, &oplock, NULL,
@@ -604,7 +604,7 @@
rc = CIFSSMBGetCIFSACL(xid, cifs_sb->tcon, fid, &pntsd, pacllen);
cFYI(1, ("GetCIFSACL rc = %d ACL len %d", rc, *pacllen));
- if (unlock_file == TRUE) /* find_readable_file increments ref count */
+ if (unlock_file == true) /* find_readable_file increments ref count */
atomic_dec(&open_file->wrtPending);
else if (pfid == NULL) /* if opened above we have to close the handle */
CIFSSMBClose(xid, cifs_sb->tcon, fid);
@@ -619,7 +619,7 @@
struct inode *inode, const char *path)
{
struct cifsFileInfo *open_file;
- int unlock_file = FALSE;
+ bool unlock_file = false;
int xid;
int rc = -EIO;
__u16 fid;
@@ -640,10 +640,10 @@
open_file = find_readable_file(CIFS_I(inode));
if (open_file) {
- unlock_file = TRUE;
+ unlock_file = true;
fid = open_file->netfid;
} else {
- int oplock = FALSE;
+ int oplock = 0;
/* open file */
rc = CIFSSMBOpen(xid, cifs_sb->tcon, path, FILE_OPEN,
WRITE_DAC, 0, &fid, &oplock, NULL,
@@ -658,7 +658,7 @@
rc = CIFSSMBSetCIFSACL(xid, cifs_sb->tcon, fid, pnntsd, acllen);
cFYI(DBG2, ("SetCIFSACL rc = %d", rc));
- if (unlock_file == TRUE)
+ if (unlock_file)
atomic_dec(&open_file->wrtPending);
else
CIFSSMBClose(xid, cifs_sb->tcon, fid);
diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c
index 39c2cbd..427a7c6 100644
--- a/fs/cifs/cifsfs.c
+++ b/fs/cifs/cifsfs.c
@@ -222,50 +222,50 @@
cifs_statfs(struct dentry *dentry, struct kstatfs *buf)
{
struct super_block *sb = dentry->d_sb;
- int xid;
+ struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
+ struct cifsTconInfo *tcon = cifs_sb->tcon;
int rc = -EOPNOTSUPP;
- struct cifs_sb_info *cifs_sb;
- struct cifsTconInfo *pTcon;
+ int xid;
xid = GetXid();
- cifs_sb = CIFS_SB(sb);
- pTcon = cifs_sb->tcon;
-
buf->f_type = CIFS_MAGIC_NUMBER;
- /* instead could get the real value via SMB_QUERY_FS_ATTRIBUTE_INFO */
- buf->f_namelen = PATH_MAX; /* PATH_MAX may be too long - it would
- presumably be total path, but note
- that some servers (includinng Samba 3)
- have a shorter maximum path */
+ /*
+ * PATH_MAX may be too long - it would presumably be total path,
+ * but note that some servers (includinng Samba 3) have a shorter
+ * maximum path.
+ *
+ * Instead could get the real value via SMB_QUERY_FS_ATTRIBUTE_INFO.
+ */
+ buf->f_namelen = PATH_MAX;
buf->f_files = 0; /* undefined */
buf->f_ffree = 0; /* unlimited */
-/* BB we could add a second check for a QFS Unix capability bit */
-/* BB FIXME check CIFS_POSIX_EXTENSIONS Unix cap first FIXME BB */
- if ((pTcon->ses->capabilities & CAP_UNIX) && (CIFS_POSIX_EXTENSIONS &
- le64_to_cpu(pTcon->fsUnixInfo.Capability)))
- rc = CIFSSMBQFSPosixInfo(xid, pTcon, buf);
+ /*
+ * We could add a second check for a QFS Unix capability bit
+ */
+ if ((tcon->ses->capabilities & CAP_UNIX) &&
+ (CIFS_POSIX_EXTENSIONS & le64_to_cpu(tcon->fsUnixInfo.Capability)))
+ rc = CIFSSMBQFSPosixInfo(xid, tcon, buf);
- /* Only need to call the old QFSInfo if failed
- on newer one */
- if (rc)
- if (pTcon->ses->capabilities & CAP_NT_SMBS)
- rc = CIFSSMBQFSInfo(xid, pTcon, buf); /* not supported by OS2 */
+ /*
+ * Only need to call the old QFSInfo if failed on newer one,
+ * e.g. by OS/2.
+ **/
+ if (rc && (tcon->ses->capabilities & CAP_NT_SMBS))
+ rc = CIFSSMBQFSInfo(xid, tcon, buf);
- /* Some old Windows servers also do not support level 103, retry with
- older level one if old server failed the previous call or we
- bypassed it because we detected that this was an older LANMAN sess */
+ /*
+ * Some old Windows servers also do not support level 103, retry with
+ * older level one if old server failed the previous call or we
+ * bypassed it because we detected that this was an older LANMAN sess
+ */
if (rc)
- rc = SMBOldQFSInfo(xid, pTcon, buf);
- /* int f_type;
- __fsid_t f_fsid;
- int f_namelen; */
- /* BB get from info in tcon struct at mount time call to QFSAttrInfo */
+ rc = SMBOldQFSInfo(xid, tcon, buf);
+
FreeXid(xid);
- return 0; /* always return success? what if volume is no
- longer available? */
+ return 0;
}
static int cifs_permission(struct inode *inode, int mask, struct nameidata *nd)
@@ -306,8 +306,8 @@
/* Until the file is open and we have gotten oplock
info back from the server, can not assume caching of
file data or metadata */
- cifs_inode->clientCanCacheRead = FALSE;
- cifs_inode->clientCanCacheAll = FALSE;
+ cifs_inode->clientCanCacheRead = false;
+ cifs_inode->clientCanCacheAll = false;
cifs_inode->vfs_inode.i_blkbits = 14; /* 2**14 = CIFS_MAX_MSGSIZE */
/* Can not set i_flags here - they get immediately overwritten
@@ -940,7 +940,7 @@
rc = CIFSSMBLock(0, pTcon, netfid,
0 /* len */ , 0 /* offset */, 0,
0, LOCKING_ANDX_OPLOCK_RELEASE,
- 0 /* wait flag */);
+ false /* wait flag */);
cFYI(1, ("Oplock release rc = %d", rc));
}
} else
diff --git a/fs/cifs/cifsfs.h b/fs/cifs/cifsfs.h
index e1dd9f3..cd1301a 100644
--- a/fs/cifs/cifsfs.h
+++ b/fs/cifs/cifsfs.h
@@ -24,14 +24,6 @@
#define ROOT_I 2
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-
extern struct file_system_type cifs_fs_type;
extern const struct address_space_operations cifs_addr_ops;
extern const struct address_space_operations cifs_addr_ops_smallbuf;
@@ -110,5 +102,5 @@
extern const struct export_operations cifs_export_ops;
#endif /* EXPERIMENTAL */
-#define CIFS_VERSION "1.52"
+#define CIFS_VERSION "1.53"
#endif /* _CIFSFS_H */
diff --git a/fs/cifs/cifsglob.h b/fs/cifs/cifsglob.h
index 69a2e19..b7d9f69 100644
--- a/fs/cifs/cifsglob.h
+++ b/fs/cifs/cifsglob.h
@@ -57,14 +57,6 @@
#include "cifspdu.h"
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-
#ifndef XATTR_DOS_ATTRIB
#define XATTR_DOS_ATTRIB "user.DOSATTRIB"
#endif
@@ -147,7 +139,7 @@
enum protocolEnum protocolType;
char versionMajor;
char versionMinor;
- unsigned svlocal:1; /* local server or remote */
+ bool svlocal:1; /* local server or remote */
atomic_t socketUseCount; /* number of open cifs sessions on socket */
atomic_t inFlight; /* number of requests on the wire to server */
#ifdef CONFIG_CIFS_STATS2
@@ -286,10 +278,10 @@
FILE_SYSTEM_DEVICE_INFO fsDevInfo;
FILE_SYSTEM_ATTRIBUTE_INFO fsAttrInfo; /* ok if fs name truncated */
FILE_SYSTEM_UNIX_INFO fsUnixInfo;
- unsigned ipc:1; /* set if connection to IPC$ eg for RPC/PIPES */
- unsigned retry:1;
- unsigned nocase:1;
- unsigned unix_ext:1; /* if off disable Linux extensions to CIFS protocol
+ bool ipc:1; /* set if connection to IPC$ eg for RPC/PIPES */
+ bool retry:1;
+ bool nocase:1;
+ bool unix_ext:1; /* if false disable Linux extensions to CIFS protocol
for this mount even if server would support */
/* BB add field for back pointer to sb struct(s)? */
};
@@ -317,10 +309,10 @@
char *srch_entries_start;
char *presume_name;
unsigned int resume_name_len;
- unsigned endOfSearch:1;
- unsigned emptyDir:1;
- unsigned unicode:1;
- unsigned smallBuf:1; /* so we know which buf_release function to call */
+ bool endOfSearch:1;
+ bool emptyDir:1;
+ bool unicode:1;
+ bool smallBuf:1; /* so we know which buf_release function to call */
};
struct cifsFileInfo {
@@ -335,9 +327,9 @@
struct inode *pInode; /* needed for oplock break */
struct mutex lock_mutex;
struct list_head llist; /* list of byte range locks we have. */
- unsigned closePend:1; /* file is marked to close */
- unsigned invalidHandle:1; /* file closed via session abend */
- unsigned messageMode:1; /* for pipes: message vs byte mode */
+ bool closePend:1; /* file is marked to close */
+ bool invalidHandle:1; /* file closed via session abend */
+ bool messageMode:1; /* for pipes: message vs byte mode */
atomic_t wrtPending; /* handle in use - defer close */
struct semaphore fh_sem; /* prevents reopen race after dead ses*/
char *search_resume_name; /* BB removeme BB */
@@ -356,9 +348,9 @@
__u32 cifsAttrs; /* e.g. DOS archive bit, sparse, compressed, system */
atomic_t inUse; /* num concurrent users (local openers cifs) of file*/
unsigned long time; /* jiffies of last update/check of inode */
- unsigned clientCanCacheRead:1; /* read oplock */
- unsigned clientCanCacheAll:1; /* read and writebehind oplock */
- unsigned oplockPending:1;
+ bool clientCanCacheRead:1; /* read oplock */
+ bool clientCanCacheAll:1; /* read and writebehind oplock */
+ bool oplockPending:1;
struct inode vfs_inode;
};
@@ -426,9 +418,9 @@
struct smb_hdr *resp_buf; /* response buffer */
int midState; /* wish this were enum but can not pass to wait_event */
__u8 command; /* smb command code */
- unsigned largeBuf:1; /* if valid response, is pointer to large buf */
- unsigned multiRsp:1; /* multiple trans2 responses for one request */
- unsigned multiEnd:1; /* both received */
+ bool largeBuf:1; /* if valid response, is pointer to large buf */
+ bool multiRsp:1; /* multiple trans2 responses for one request */
+ bool multiEnd:1; /* both received */
};
struct oplock_q_entry {
diff --git a/fs/cifs/cifspdu.h b/fs/cifs/cifspdu.h
index 9f49c2f..a0d26b5 100644
--- a/fs/cifs/cifspdu.h
+++ b/fs/cifs/cifspdu.h
@@ -2050,7 +2050,7 @@
to 0xFFFF00 */
#define CIFS_UNIX_LARGE_WRITE_CAP 0x00000080
#define CIFS_UNIX_TRANSPORT_ENCRYPTION_CAP 0x00000100 /* can do SPNEGO crypt */
-#define CIFS_UNIX_TRANPSORT_ENCRYPTION_MANDATORY_CAP 0x00000200 /* must do */
+#define CIFS_UNIX_TRANSPORT_ENCRYPTION_MANDATORY_CAP 0x00000200 /* must do */
#define CIFS_UNIX_PROXY_CAP 0x00000400 /* Proxy cap: 0xACE ioctl and
QFS PROXY call */
#ifdef CONFIG_CIFS_POSIX
diff --git a/fs/cifs/cifsproto.h b/fs/cifs/cifsproto.h
index 50f9fda..d481f6c 100644
--- a/fs/cifs/cifsproto.h
+++ b/fs/cifs/cifsproto.h
@@ -59,8 +59,9 @@
struct smb_hdr *out_buf,
int *bytes_returned);
extern int checkSMB(struct smb_hdr *smb, __u16 mid, unsigned int length);
-extern int is_valid_oplock_break(struct smb_hdr *smb, struct TCP_Server_Info *);
-extern int is_size_safe_to_change(struct cifsInodeInfo *, __u64 eof);
+extern bool is_valid_oplock_break(struct smb_hdr *smb,
+ struct TCP_Server_Info *);
+extern bool is_size_safe_to_change(struct cifsInodeInfo *, __u64 eof);
extern struct cifsFileInfo *find_writable_file(struct cifsInodeInfo *);
#ifdef CONFIG_CIFS_EXPERIMENTAL
extern struct cifsFileInfo *find_readable_file(struct cifsInodeInfo *);
@@ -69,7 +70,7 @@
extern unsigned int smbCalcSize_LE(struct smb_hdr *ptr);
extern int decode_negTokenInit(unsigned char *security_blob, int length,
enum securityEnum *secType);
-extern int cifs_inet_pton(int, char *source, void *dst);
+extern int cifs_inet_pton(const int, const char *source, void *dst);
extern int map_smb_to_linux_error(struct smb_hdr *smb, int logErr);
extern void header_assemble(struct smb_hdr *, char /* command */ ,
const struct cifsTconInfo *, int /* length of
@@ -187,12 +188,12 @@
#endif /* possibly unneeded function */
extern int CIFSSMBSetEOF(const int xid, struct cifsTconInfo *tcon,
const char *fileName, __u64 size,
- int setAllocationSizeFlag,
+ bool setAllocationSizeFlag,
const struct nls_table *nls_codepage,
int remap_special_chars);
extern int CIFSSMBSetFileSize(const int xid, struct cifsTconInfo *tcon,
__u64 size, __u16 fileHandle, __u32 opener_pid,
- int AllocSizeFlag);
+ bool AllocSizeFlag);
extern int CIFSSMBUnixSetPerms(const int xid, struct cifsTconInfo *pTcon,
char *full_path, __u64 mode, __u64 uid,
__u64 gid, dev_t dev,
@@ -291,11 +292,11 @@
const __u16 netfid, const __u64 len,
const __u64 offset, const __u32 numUnlock,
const __u32 numLock, const __u8 lockType,
- const int waitFlag);
+ const bool waitFlag);
extern int CIFSSMBPosixLock(const int xid, struct cifsTconInfo *tcon,
const __u16 smb_file_id, const int get_flag,
const __u64 len, struct file_lock *,
- const __u16 lock_type, const int waitFlag);
+ const __u16 lock_type, const bool waitFlag);
extern int CIFSSMBTDis(const int xid, struct cifsTconInfo *tcon);
extern int CIFSSMBLogoff(const int xid, struct cifsSesInfo *ses);
diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c
index 4728fa9..cfd9750 100644
--- a/fs/cifs/cifssmb.c
+++ b/fs/cifs/cifssmb.c
@@ -95,7 +95,7 @@
list_for_each_safe(tmp, tmp1, &pTcon->openFileList) {
open_file = list_entry(tmp, struct cifsFileInfo, tlist);
if (open_file)
- open_file->invalidHandle = TRUE;
+ open_file->invalidHandle = true;
}
write_unlock(&GlobalSMBSeslock);
/* BB Add call to invalidate_inodes(sb) for all superblocks mounted
@@ -141,7 +141,7 @@
if (tcon->ses->server->tcpStatus ==
CifsNeedReconnect) {
/* on "soft" mounts we wait once */
- if ((tcon->retry == FALSE) ||
+ if (!tcon->retry ||
(tcon->ses->status == CifsExiting)) {
cFYI(1, ("gave up waiting on "
"reconnect in smb_init"));
@@ -289,7 +289,7 @@
if (tcon->ses->server->tcpStatus ==
CifsNeedReconnect) {
/* on "soft" mounts we wait once */
- if ((tcon->retry == FALSE) ||
+ if (!tcon->retry ||
(tcon->ses->status == CifsExiting)) {
cFYI(1, ("gave up waiting on "
"reconnect in smb_init"));
@@ -1686,7 +1686,7 @@
CIFSSMBLock(const int xid, struct cifsTconInfo *tcon,
const __u16 smb_file_id, const __u64 len,
const __u64 offset, const __u32 numUnlock,
- const __u32 numLock, const __u8 lockType, const int waitFlag)
+ const __u32 numLock, const __u8 lockType, const bool waitFlag)
{
int rc = 0;
LOCK_REQ *pSMB = NULL;
@@ -1695,7 +1695,7 @@
int timeout = 0;
__u16 count;
- cFYI(1, ("CIFSSMBLock timeout %d numLock %d", waitFlag, numLock));
+ cFYI(1, ("CIFSSMBLock timeout %d numLock %d", (int)waitFlag, numLock));
rc = small_smb_init(SMB_COM_LOCKING_ANDX, 8, tcon, (void **) &pSMB);
if (rc)
@@ -1706,7 +1706,7 @@
if (lockType == LOCKING_ANDX_OPLOCK_RELEASE) {
timeout = CIFS_ASYNC_OP; /* no response expected */
pSMB->Timeout = 0;
- } else if (waitFlag == TRUE) {
+ } else if (waitFlag) {
timeout = CIFS_BLOCKING_OP; /* blocking operation, no timeout */
pSMB->Timeout = cpu_to_le32(-1);/* blocking - do not time out */
} else {
@@ -1756,7 +1756,7 @@
CIFSSMBPosixLock(const int xid, struct cifsTconInfo *tcon,
const __u16 smb_file_id, const int get_flag, const __u64 len,
struct file_lock *pLockData, const __u16 lock_type,
- const int waitFlag)
+ const bool waitFlag)
{
struct smb_com_transaction2_sfi_req *pSMB = NULL;
struct smb_com_transaction2_sfi_rsp *pSMBr = NULL;
@@ -3581,9 +3581,9 @@
rc = validate_t2((struct smb_t2_rsp *)pSMBr);
if (rc == 0) {
if (pSMBr->hdr.Flags2 & SMBFLG2_UNICODE)
- psrch_inf->unicode = TRUE;
+ psrch_inf->unicode = true;
else
- psrch_inf->unicode = FALSE;
+ psrch_inf->unicode = false;
psrch_inf->ntwrk_buf_start = (char *)pSMBr;
psrch_inf->smallBuf = 0;
@@ -3594,9 +3594,9 @@
le16_to_cpu(pSMBr->t2.ParameterOffset));
if (parms->EndofSearch)
- psrch_inf->endOfSearch = TRUE;
+ psrch_inf->endOfSearch = true;
else
- psrch_inf->endOfSearch = FALSE;
+ psrch_inf->endOfSearch = false;
psrch_inf->entries_in_buffer =
le16_to_cpu(parms->SearchCount);
@@ -3624,7 +3624,7 @@
cFYI(1, ("In FindNext"));
- if (psrch_inf->endOfSearch == TRUE)
+ if (psrch_inf->endOfSearch)
return -ENOENT;
rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
@@ -3682,7 +3682,7 @@
cifs_stats_inc(&tcon->num_fnext);
if (rc) {
if (rc == -EBADF) {
- psrch_inf->endOfSearch = TRUE;
+ psrch_inf->endOfSearch = true;
rc = 0; /* search probably was closed at end of search*/
} else
cFYI(1, ("FindNext returned = %d", rc));
@@ -3692,9 +3692,9 @@
if (rc == 0) {
/* BB fixme add lock for file (srch_info) struct here */
if (pSMBr->hdr.Flags2 & SMBFLG2_UNICODE)
- psrch_inf->unicode = TRUE;
+ psrch_inf->unicode = true;
else
- psrch_inf->unicode = FALSE;
+ psrch_inf->unicode = false;
response_data = (char *) &pSMBr->hdr.Protocol +
le16_to_cpu(pSMBr->t2.ParameterOffset);
parms = (T2_FNEXT_RSP_PARMS *)response_data;
@@ -3709,9 +3709,9 @@
psrch_inf->ntwrk_buf_start = (char *)pSMB;
psrch_inf->smallBuf = 0;
if (parms->EndofSearch)
- psrch_inf->endOfSearch = TRUE;
+ psrch_inf->endOfSearch = true;
else
- psrch_inf->endOfSearch = FALSE;
+ psrch_inf->endOfSearch = false;
psrch_inf->entries_in_buffer =
le16_to_cpu(parms->SearchCount);
psrch_inf->index_of_last_entry +=
@@ -4586,7 +4586,7 @@
int
CIFSSMBSetEOF(const int xid, struct cifsTconInfo *tcon, const char *fileName,
- __u64 size, int SetAllocation,
+ __u64 size, bool SetAllocation,
const struct nls_table *nls_codepage, int remap)
{
struct smb_com_transaction2_spi_req *pSMB = NULL;
@@ -4675,7 +4675,7 @@
int
CIFSSMBSetFileSize(const int xid, struct cifsTconInfo *tcon, __u64 size,
- __u16 fid, __u32 pid_of_opener, int SetAllocation)
+ __u16 fid, __u32 pid_of_opener, bool SetAllocation)
{
struct smb_com_transaction2_sfi_req *pSMB = NULL;
char *data_offset;
diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c
index e171067..791ca5c 100644
--- a/fs/cifs/connect.c
+++ b/fs/cifs/connect.c
@@ -49,8 +49,6 @@
#define CIFS_PORT 445
#define RFC1001_PORT 139
-static DECLARE_COMPLETION(cifsd_complete);
-
extern void SMBNTencrypt(unsigned char *passwd, unsigned char *c8,
unsigned char *p24);
@@ -71,23 +69,23 @@
mode_t file_mode;
mode_t dir_mode;
unsigned secFlg;
- unsigned rw:1;
- unsigned retry:1;
- unsigned intr:1;
- unsigned setuids:1;
- unsigned override_uid:1;
- unsigned override_gid:1;
- unsigned noperm:1;
- unsigned no_psx_acl:1; /* set if posix acl support should be disabled */
- unsigned cifs_acl:1;
- unsigned no_xattr:1; /* set if xattr (EA) support should be disabled*/
- unsigned server_ino:1; /* use inode numbers from server ie UniqueId */
- unsigned direct_io:1;
- unsigned remap:1; /* set to remap seven reserved chars in filenames */
- unsigned posix_paths:1; /* unset to not ask for posix pathnames. */
- unsigned no_linux_ext:1;
- unsigned sfu_emul:1;
- unsigned nullauth:1; /* attempt to authenticate with null user */
+ bool rw:1;
+ bool retry:1;
+ bool intr:1;
+ bool setuids:1;
+ bool override_uid:1;
+ bool override_gid:1;
+ bool noperm:1;
+ bool no_psx_acl:1; /* set if posix acl support should be disabled */
+ bool cifs_acl:1;
+ bool no_xattr:1; /* set if xattr (EA) support should be disabled*/
+ bool server_ino:1; /* use inode numbers from server ie UniqueId */
+ bool direct_io:1;
+ bool remap:1; /* set to remap seven reserved chars in filenames */
+ bool posix_paths:1; /* unset to not ask for posix pathnames. */
+ bool no_linux_ext:1;
+ bool sfu_emul:1;
+ bool nullauth:1; /* attempt to authenticate with null user */
unsigned nocase; /* request case insensitive filenames */
unsigned nobrl; /* disable sending byte range locks to srv */
unsigned int rsize;
@@ -345,8 +343,8 @@
struct task_struct *task_to_wake = NULL;
struct mid_q_entry *mid_entry;
char temp;
- int isLargeBuf = FALSE;
- int isMultiRsp;
+ bool isLargeBuf = false;
+ bool isMultiRsp;
int reconnect;
current->flags |= PF_MEMALLOC;
@@ -356,7 +354,6 @@
atomic_inc(&tcpSesAllocCount);
length = tcpSesAllocCount.counter;
write_unlock(&GlobalSMBSeslock);
- complete(&cifsd_complete);
if (length > 1)
mempool_resize(cifs_req_poolp, length + cifs_min_rcv,
GFP_KERNEL);
@@ -390,8 +387,8 @@
} else /* if existing small buf clear beginning */
memset(smallbuf, 0, sizeof(struct smb_hdr));
- isLargeBuf = FALSE;
- isMultiRsp = FALSE;
+ isLargeBuf = false;
+ isMultiRsp = false;
smb_buffer = smallbuf;
iov.iov_base = smb_buffer;
iov.iov_len = 4;
@@ -517,7 +514,7 @@
reconnect = 0;
if (pdu_length > MAX_CIFS_SMALL_BUFFER_SIZE - 4) {
- isLargeBuf = TRUE;
+ isLargeBuf = true;
memcpy(bigbuf, smallbuf, 4);
smb_buffer = bigbuf;
}
@@ -582,16 +579,18 @@
(mid_entry->command == smb_buffer->Command)) {
if (check2ndT2(smb_buffer,server->maxBuf) > 0) {
/* We have a multipart transact2 resp */
- isMultiRsp = TRUE;
+ isMultiRsp = true;
if (mid_entry->resp_buf) {
/* merge response - fix up 1st*/
if (coalesce_t2(smb_buffer,
mid_entry->resp_buf)) {
- mid_entry->multiRsp = 1;
+ mid_entry->multiRsp =
+ true;
break;
} else {
/* all parts received */
- mid_entry->multiEnd = 1;
+ mid_entry->multiEnd =
+ true;
goto multi_t2_fnd;
}
} else {
@@ -603,17 +602,15 @@
/* Have first buffer */
mid_entry->resp_buf =
smb_buffer;
- mid_entry->largeBuf = 1;
+ mid_entry->largeBuf =
+ true;
bigbuf = NULL;
}
}
break;
}
mid_entry->resp_buf = smb_buffer;
- if (isLargeBuf)
- mid_entry->largeBuf = 1;
- else
- mid_entry->largeBuf = 0;
+ mid_entry->largeBuf = isLargeBuf;
multi_t2_fnd:
task_to_wake = mid_entry->tsk;
mid_entry->midState = MID_RESPONSE_RECEIVED;
@@ -638,8 +635,8 @@
smallbuf = NULL;
}
wake_up_process(task_to_wake);
- } else if ((is_valid_oplock_break(smb_buffer, server) == FALSE)
- && (isMultiRsp == FALSE)) {
+ } else if (!is_valid_oplock_break(smb_buffer, server) &&
+ !isMultiRsp) {
cERROR(1, ("No task to wake, unknown frame received! "
"NumMids %d", midCount.counter));
cifs_dump_mem("Received Data is: ", (char *)smb_buffer,
@@ -825,7 +822,7 @@
vol->file_mode = (S_IRWXUGO | S_ISGID) & (~S_IXGRP);
/* vol->retry default is 0 (i.e. "soft" limited retry not hard retry) */
- vol->rw = TRUE;
+ vol->rw = true;
/* default is always to request posix paths. */
vol->posix_paths = 1;
@@ -1181,7 +1178,7 @@
} else if (strnicmp(data, "guest", 5) == 0) {
/* ignore */
} else if (strnicmp(data, "rw", 2) == 0) {
- vol->rw = TRUE;
+ vol->rw = true;
} else if ((strnicmp(data, "suid", 4) == 0) ||
(strnicmp(data, "nosuid", 6) == 0) ||
(strnicmp(data, "exec", 4) == 0) ||
@@ -1197,7 +1194,7 @@
is ok to just ignore them */
continue;
} else if (strnicmp(data, "ro", 2) == 0) {
- vol->rw = FALSE;
+ vol->rw = false;
} else if (strnicmp(data, "hard", 4) == 0) {
vol->retry = 1;
} else if (strnicmp(data, "soft", 4) == 0) {
@@ -1305,6 +1302,9 @@
"begin with // or \\\\ \n");
return 1;
}
+ value = strpbrk(vol->UNC+2, "/\\");
+ if (value)
+ *value = '\\';
} else {
printk(KERN_WARNING "CIFS: UNC name too long\n");
return 1;
@@ -1362,45 +1362,43 @@
{
struct list_head *tmp;
struct cifsTconInfo *tcon;
+ __be32 old_ip;
read_lock(&GlobalSMBSeslock);
+
list_for_each(tmp, &GlobalTreeConnectionList) {
cFYI(1, ("Next tcon"));
tcon = list_entry(tmp, struct cifsTconInfo, cifsConnectionList);
- if (tcon->ses) {
- if (tcon->ses->server) {
- cFYI(1,
- ("old ip addr: %x == new ip %x ?",
- tcon->ses->server->addr.sockAddr.sin_addr.
- s_addr, new_target_ip_addr));
- if (tcon->ses->server->addr.sockAddr.sin_addr.
- s_addr == new_target_ip_addr) {
- /* BB lock tcon, server and tcp session and increment use count here? */
- /* found a match on the TCP session */
- /* BB check if reconnection needed */
- cFYI(1,
- ("IP match, old UNC: %s new: %s",
- tcon->treeName, uncName));
- if (strncmp
- (tcon->treeName, uncName,
- MAX_TREE_SIZE) == 0) {
- cFYI(1,
- ("and old usr: %s new: %s",
- tcon->treeName, uncName));
- if (strncmp
- (tcon->ses->userName,
- userName,
- MAX_USERNAME_SIZE) == 0) {
- read_unlock(&GlobalSMBSeslock);
- /* matched smb session
- (user name */
- return tcon;
- }
- }
- }
- }
- }
+ if (!tcon->ses || !tcon->ses->server)
+ continue;
+
+ old_ip = tcon->ses->server->addr.sockAddr.sin_addr.s_addr;
+ cFYI(1, ("old ip addr: %x == new ip %x ?",
+ old_ip, new_target_ip_addr));
+
+ if (old_ip != new_target_ip_addr)
+ continue;
+
+ /* BB lock tcon, server, tcp session and increment use count? */
+ /* found a match on the TCP session */
+ /* BB check if reconnection needed */
+ cFYI(1, ("IP match, old UNC: %s new: %s",
+ tcon->treeName, uncName));
+
+ if (strncmp(tcon->treeName, uncName, MAX_TREE_SIZE))
+ continue;
+
+ cFYI(1, ("and old usr: %s new: %s",
+ tcon->treeName, uncName));
+
+ if (strncmp(tcon->ses->userName, userName, MAX_USERNAME_SIZE))
+ continue;
+
+ /* matched smb session (user name) */
+ read_unlock(&GlobalSMBSeslock);
+ return tcon;
}
+
read_unlock(&GlobalSMBSeslock);
return NULL;
}
@@ -1982,7 +1980,6 @@
kfree(srvTcp->hostname);
goto out;
}
- wait_for_completion(&cifsd_complete);
rc = 0;
memcpy(srvTcp->workstation_RFC1001_name,
volume_info.source_rfc1001_name, 16);
@@ -2602,7 +2599,7 @@
static int
CIFSNTLMSSPNegotiateSessSetup(unsigned int xid,
- struct cifsSesInfo *ses, int *pNTLMv2_flag,
+ struct cifsSesInfo *ses, bool *pNTLMv2_flag,
const struct nls_table *nls_codepage)
{
struct smb_hdr *smb_buffer;
@@ -2625,7 +2622,7 @@
if (ses == NULL)
return -EINVAL;
domain = ses->domainName;
- *pNTLMv2_flag = FALSE;
+ *pNTLMv2_flag = false;
smb_buffer = cifs_buf_get();
if (smb_buffer == NULL) {
return -ENOMEM;
@@ -2778,7 +2775,7 @@
CIFS_CRYPTO_KEY_SIZE);
if (SecurityBlob2->NegotiateFlags &
cpu_to_le32(NTLMSSP_NEGOTIATE_NTLMV2))
- *pNTLMv2_flag = TRUE;
+ *pNTLMv2_flag = true;
if ((SecurityBlob2->NegotiateFlags &
cpu_to_le32(NTLMSSP_NEGOTIATE_ALWAYS_SIGN))
@@ -2939,7 +2936,7 @@
}
static int
CIFSNTLMSSPAuthSessSetup(unsigned int xid, struct cifsSesInfo *ses,
- char *ntlm_session_key, int ntlmv2_flag,
+ char *ntlm_session_key, bool ntlmv2_flag,
const struct nls_table *nls_codepage)
{
struct smb_hdr *smb_buffer;
@@ -3556,8 +3553,6 @@
cifs_sb->prepath = NULL;
kfree(tmp);
if (ses)
- schedule_timeout_interruptible(msecs_to_jiffies(500));
- if (ses)
sesInfoFree(ses);
FreeXid(xid);
@@ -3569,7 +3564,7 @@
{
int rc = 0;
char ntlm_session_key[CIFS_SESS_KEY_SIZE];
- int ntlmv2_flag = FALSE;
+ bool ntlmv2_flag = false;
int first_time = 0;
/* what if server changes its buffer size after dropping the session? */
diff --git a/fs/cifs/dir.c b/fs/cifs/dir.c
index 0f5c62b..6ed7759 100644
--- a/fs/cifs/dir.c
+++ b/fs/cifs/dir.c
@@ -130,7 +130,7 @@
struct cifsFileInfo *pCifsFile = NULL;
struct cifsInodeInfo *pCifsInode;
int disposition = FILE_OVERWRITE_IF;
- int write_only = FALSE;
+ bool write_only = false;
xid = GetXid();
@@ -152,7 +152,7 @@
if (oflags & FMODE_WRITE) {
desiredAccess |= GENERIC_WRITE;
if (!(oflags & FMODE_READ))
- write_only = TRUE;
+ write_only = true;
}
if ((oflags & (O_CREAT | O_EXCL)) == (O_CREAT | O_EXCL))
@@ -254,7 +254,7 @@
d_instantiate(direntry, newinode);
}
if ((nd == NULL /* nfsd case - nfs srv does not set nd */) ||
- ((nd->flags & LOOKUP_OPEN) == FALSE)) {
+ (!(nd->flags & LOOKUP_OPEN))) {
/* mknod case - do not leave file open */
CIFSSMBClose(xid, pTcon, fileHandle);
} else if (newinode) {
@@ -266,8 +266,8 @@
pCifsFile->netfid = fileHandle;
pCifsFile->pid = current->tgid;
pCifsFile->pInode = newinode;
- pCifsFile->invalidHandle = FALSE;
- pCifsFile->closePend = FALSE;
+ pCifsFile->invalidHandle = false;
+ pCifsFile->closePend = false;
init_MUTEX(&pCifsFile->fh_sem);
mutex_init(&pCifsFile->lock_mutex);
INIT_LIST_HEAD(&pCifsFile->llist);
@@ -280,7 +280,7 @@
pCifsInode = CIFS_I(newinode);
if (pCifsInode) {
/* if readable file instance put first in list*/
- if (write_only == TRUE) {
+ if (write_only) {
list_add_tail(&pCifsFile->flist,
&pCifsInode->openFileList);
} else {
@@ -288,12 +288,12 @@
&pCifsInode->openFileList);
}
if ((oplock & 0xF) == OPLOCK_EXCLUSIVE) {
- pCifsInode->clientCanCacheAll = TRUE;
- pCifsInode->clientCanCacheRead = TRUE;
+ pCifsInode->clientCanCacheAll = true;
+ pCifsInode->clientCanCacheRead = true;
cFYI(1, ("Exclusive Oplock inode %p",
newinode));
} else if ((oplock & 0xF) == OPLOCK_READ)
- pCifsInode->clientCanCacheRead = TRUE;
+ pCifsInode->clientCanCacheRead = true;
}
write_unlock(&GlobalSMBSeslock);
}
diff --git a/fs/cifs/dns_resolve.c b/fs/cifs/dns_resolve.c
index 7cc86c4..939e256 100644
--- a/fs/cifs/dns_resolve.c
+++ b/fs/cifs/dns_resolve.c
@@ -55,6 +55,32 @@
.match = user_match,
};
+/* Checks if supplied name is IP address
+ * returns:
+ * 1 - name is IP
+ * 0 - name is not IP
+ */
+static int is_ip(const char *name)
+{
+ int rc;
+ struct sockaddr_in sin_server;
+ struct sockaddr_in6 sin_server6;
+
+ rc = cifs_inet_pton(AF_INET, name,
+ &sin_server.sin_addr.s_addr);
+
+ if (rc <= 0) {
+ /* not ipv4 address, try ipv6 */
+ rc = cifs_inet_pton(AF_INET6, name,
+ &sin_server6.sin6_addr.in6_u);
+ if (rc > 0)
+ return 1;
+ } else {
+ return 1;
+ }
+ /* we failed translating address */
+ return 0;
+}
/* Resolves server name to ip address.
* input:
@@ -67,8 +93,9 @@
dns_resolve_server_name_to_ip(const char *unc, char **ip_addr)
{
int rc = -EAGAIN;
- struct key *rkey;
+ struct key *rkey = ERR_PTR(-EAGAIN);
char *name;
+ char *data = NULL;
int len;
if (!ip_addr || !unc)
@@ -97,26 +124,41 @@
memcpy(name, unc+2, len);
name[len] = 0;
+ if (is_ip(name)) {
+ cFYI(1, ("%s: it is IP, skipping dns upcall: %s",
+ __func__, name));
+ data = name;
+ goto skip_upcall;
+ }
+
rkey = request_key(&key_type_dns_resolver, name, "");
if (!IS_ERR(rkey)) {
- len = strlen(rkey->payload.data);
- *ip_addr = kmalloc(len+1, GFP_KERNEL);
- if (*ip_addr) {
- memcpy(*ip_addr, rkey->payload.data, len);
- (*ip_addr)[len] = '\0';
- cFYI(1, ("%s: resolved: %s to %s", __func__,
+ data = rkey->payload.data;
+ cFYI(1, ("%s: resolved: %s to %s", __func__,
rkey->description,
*ip_addr
));
+ } else {
+ cERROR(1, ("%s: unable to resolve: %s", __func__, name));
+ goto out;
+ }
+
+skip_upcall:
+ if (data) {
+ len = strlen(data);
+ *ip_addr = kmalloc(len+1, GFP_KERNEL);
+ if (*ip_addr) {
+ memcpy(*ip_addr, data, len);
+ (*ip_addr)[len] = '\0';
rc = 0;
} else {
rc = -ENOMEM;
}
- key_put(rkey);
- } else {
- cERROR(1, ("%s: unable to resolve: %s", __func__, name));
+ if (!IS_ERR(rkey))
+ key_put(rkey);
}
+out:
kfree(name);
return rc;
}
diff --git a/fs/cifs/fcntl.c b/fs/cifs/fcntl.c
index 7d1d5aa..5a57581 100644
--- a/fs/cifs/fcntl.c
+++ b/fs/cifs/fcntl.c
@@ -68,7 +68,7 @@
{
int xid;
int rc = -EINVAL;
- int oplock = FALSE;
+ int oplock = 0;
struct cifs_sb_info *cifs_sb;
struct cifsTconInfo *pTcon;
char *full_path = NULL;
diff --git a/fs/cifs/file.c b/fs/cifs/file.c
index 40b6900..31a0a33 100644
--- a/fs/cifs/file.c
+++ b/fs/cifs/file.c
@@ -51,8 +51,8 @@
INIT_LIST_HEAD(&private_data->llist);
private_data->pfile = file; /* needed for writepage */
private_data->pInode = inode;
- private_data->invalidHandle = FALSE;
- private_data->closePend = FALSE;
+ private_data->invalidHandle = false;
+ private_data->closePend = false;
/* we have to track num writers to the inode, since writepages
does not tell us which handle the write is for so there can
be a close (overlapping with write) of the filehandle that
@@ -148,12 +148,12 @@
full_path, buf, inode->i_sb, xid, NULL);
if ((*oplock & 0xF) == OPLOCK_EXCLUSIVE) {
- pCifsInode->clientCanCacheAll = TRUE;
- pCifsInode->clientCanCacheRead = TRUE;
+ pCifsInode->clientCanCacheAll = true;
+ pCifsInode->clientCanCacheRead = true;
cFYI(1, ("Exclusive Oplock granted on inode %p",
file->f_path.dentry->d_inode));
} else if ((*oplock & 0xF) == OPLOCK_READ)
- pCifsInode->clientCanCacheRead = TRUE;
+ pCifsInode->clientCanCacheRead = true;
return rc;
}
@@ -247,7 +247,7 @@
if (oplockEnabled)
oplock = REQ_OPLOCK;
else
- oplock = FALSE;
+ oplock = 0;
/* BB pass O_SYNC flag through on file attributes .. BB */
@@ -339,7 +339,7 @@
return rc;
}
-static int cifs_reopen_file(struct file *file, int can_flush)
+static int cifs_reopen_file(struct file *file, bool can_flush)
{
int rc = -EACCES;
int xid, oplock;
@@ -360,7 +360,7 @@
xid = GetXid();
down(&pCifsFile->fh_sem);
- if (pCifsFile->invalidHandle == FALSE) {
+ if (!pCifsFile->invalidHandle) {
up(&pCifsFile->fh_sem);
FreeXid(xid);
return 0;
@@ -404,7 +404,7 @@
if (oplockEnabled)
oplock = REQ_OPLOCK;
else
- oplock = FALSE;
+ oplock = 0;
/* Can not refresh inode by passing in file_info buf to be returned
by SMBOpen and then calling get_inode_info with returned buf
@@ -422,7 +422,7 @@
cFYI(1, ("oplock: %d", oplock));
} else {
pCifsFile->netfid = netfid;
- pCifsFile->invalidHandle = FALSE;
+ pCifsFile->invalidHandle = false;
up(&pCifsFile->fh_sem);
pCifsInode = CIFS_I(inode);
if (pCifsInode) {
@@ -432,8 +432,8 @@
CIFS_I(inode)->write_behind_rc = rc;
/* temporarily disable caching while we
go to server to get inode info */
- pCifsInode->clientCanCacheAll = FALSE;
- pCifsInode->clientCanCacheRead = FALSE;
+ pCifsInode->clientCanCacheAll = false;
+ pCifsInode->clientCanCacheRead = false;
if (pTcon->unix_ext)
rc = cifs_get_inode_info_unix(&inode,
full_path, inode->i_sb, xid);
@@ -448,16 +448,16 @@
we can not go to the server to get the new inod
info */
if ((oplock & 0xF) == OPLOCK_EXCLUSIVE) {
- pCifsInode->clientCanCacheAll = TRUE;
- pCifsInode->clientCanCacheRead = TRUE;
+ pCifsInode->clientCanCacheAll = true;
+ pCifsInode->clientCanCacheRead = true;
cFYI(1, ("Exclusive Oplock granted on inode %p",
file->f_path.dentry->d_inode));
} else if ((oplock & 0xF) == OPLOCK_READ) {
- pCifsInode->clientCanCacheRead = TRUE;
- pCifsInode->clientCanCacheAll = FALSE;
+ pCifsInode->clientCanCacheRead = true;
+ pCifsInode->clientCanCacheAll = false;
} else {
- pCifsInode->clientCanCacheRead = FALSE;
- pCifsInode->clientCanCacheAll = FALSE;
+ pCifsInode->clientCanCacheRead = false;
+ pCifsInode->clientCanCacheAll = false;
}
cifs_relock_file(pCifsFile);
}
@@ -484,7 +484,7 @@
if (pSMBFile) {
struct cifsLockInfo *li, *tmp;
- pSMBFile->closePend = TRUE;
+ pSMBFile->closePend = true;
if (pTcon) {
/* no sense reconnecting to close a file that is
already closed */
@@ -553,8 +553,8 @@
cFYI(1, ("closing last open instance for inode %p", inode));
/* if the file is not open we do not know if we can cache info
on this inode, much less write behind and read ahead */
- CIFS_I(inode)->clientCanCacheRead = FALSE;
- CIFS_I(inode)->clientCanCacheAll = FALSE;
+ CIFS_I(inode)->clientCanCacheRead = false;
+ CIFS_I(inode)->clientCanCacheAll = false;
}
read_unlock(&GlobalSMBSeslock);
if ((rc == 0) && CIFS_I(inode)->write_behind_rc)
@@ -583,9 +583,9 @@
pTcon = cifs_sb->tcon;
cFYI(1, ("Freeing private data in close dir"));
- if ((pCFileStruct->srch_inf.endOfSearch == FALSE) &&
- (pCFileStruct->invalidHandle == FALSE)) {
- pCFileStruct->invalidHandle = TRUE;
+ if (!pCFileStruct->srch_inf.endOfSearch &&
+ !pCFileStruct->invalidHandle) {
+ pCFileStruct->invalidHandle = true;
rc = CIFSFindClose(xid, pTcon, pCFileStruct->netfid);
cFYI(1, ("Closing uncompleted readdir with rc %d",
rc));
@@ -637,12 +637,12 @@
__u32 numLock = 0;
__u32 numUnlock = 0;
__u64 length;
- int wait_flag = FALSE;
+ bool wait_flag = false;
struct cifs_sb_info *cifs_sb;
struct cifsTconInfo *pTcon;
__u16 netfid;
__u8 lockType = LOCKING_ANDX_LARGE_FILES;
- int posix_locking;
+ bool posix_locking;
length = 1 + pfLock->fl_end - pfLock->fl_start;
rc = -EACCES;
@@ -659,7 +659,7 @@
cFYI(1, ("Flock"));
if (pfLock->fl_flags & FL_SLEEP) {
cFYI(1, ("Blocking lock"));
- wait_flag = TRUE;
+ wait_flag = true;
}
if (pfLock->fl_flags & FL_ACCESS)
cFYI(1, ("Process suspended by mandatory locking - "
@@ -794,7 +794,7 @@
stored_rc = CIFSSMBLock(xid, pTcon,
netfid,
li->length, li->offset,
- 1, 0, li->type, FALSE);
+ 1, 0, li->type, false);
if (stored_rc)
rc = stored_rc;
@@ -866,7 +866,7 @@
filemap_fdatawait from here so tell
reopen_file not to flush data to server
now */
- rc = cifs_reopen_file(file, FALSE);
+ rc = cifs_reopen_file(file, false);
if (rc != 0)
break;
}
@@ -966,7 +966,7 @@
filemap_fdatawait from here so tell
reopen_file not to flush data to
server now */
- rc = cifs_reopen_file(file, FALSE);
+ rc = cifs_reopen_file(file, false);
if (rc != 0)
break;
}
@@ -1093,7 +1093,7 @@
read_unlock(&GlobalSMBSeslock);
/* Had to unlock since following call can block */
- rc = cifs_reopen_file(open_file->pfile, FALSE);
+ rc = cifs_reopen_file(open_file->pfile, false);
if (!rc) {
if (!open_file->closePend)
return open_file;
@@ -1608,7 +1608,7 @@
int buf_type = CIFS_NO_BUFFER;
if ((open_file->invalidHandle) &&
(!open_file->closePend)) {
- rc = cifs_reopen_file(file, TRUE);
+ rc = cifs_reopen_file(file, true);
if (rc != 0)
break;
}
@@ -1693,7 +1693,7 @@
while (rc == -EAGAIN) {
if ((open_file->invalidHandle) &&
(!open_file->closePend)) {
- rc = cifs_reopen_file(file, TRUE);
+ rc = cifs_reopen_file(file, true);
if (rc != 0)
break;
}
@@ -1850,7 +1850,7 @@
while (rc == -EAGAIN) {
if ((open_file->invalidHandle) &&
(!open_file->closePend)) {
- rc = cifs_reopen_file(file, TRUE);
+ rc = cifs_reopen_file(file, true);
if (rc != 0)
break;
}
@@ -2009,10 +2009,10 @@
refreshing the inode only on increases in the file size
but this is tricky to do without racing with writebehind
page caching in the current Linux kernel design */
-int is_size_safe_to_change(struct cifsInodeInfo *cifsInode, __u64 end_of_file)
+bool is_size_safe_to_change(struct cifsInodeInfo *cifsInode, __u64 end_of_file)
{
if (!cifsInode)
- return 1;
+ return true;
if (is_inode_writable(cifsInode)) {
/* This inode is open for write at least once */
@@ -2022,15 +2022,15 @@
if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DIRECT_IO) {
/* since no page cache to corrupt on directio
we can change size safely */
- return 1;
+ return true;
}
if (i_size_read(&cifsInode->vfs_inode) < end_of_file)
- return 1;
+ return true;
- return 0;
+ return false;
} else
- return 1;
+ return true;
}
static int cifs_prepare_write(struct file *file, struct page *page,
diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c
index e1031b9..0d9d2e6d 100644
--- a/fs/cifs/inode.c
+++ b/fs/cifs/inode.c
@@ -281,7 +281,7 @@
struct cifs_sb_info *cifs_sb, int xid)
{
int rc;
- int oplock = FALSE;
+ int oplock = 0;
__u16 netfid;
struct cifsTconInfo *pTcon = cifs_sb->tcon;
char buf[24];
@@ -389,7 +389,7 @@
struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
const unsigned char *full_path = NULL;
char *buf = NULL;
- int adjustTZ = FALSE;
+ bool adjustTZ = false;
bool is_dfs_referral = false;
pTcon = cifs_sb->tcon;
@@ -425,7 +425,7 @@
pfindData, cifs_sb->local_nls,
cifs_sb->mnt_cifs_flags &
CIFS_MOUNT_MAP_SPECIAL_CHR);
- adjustTZ = TRUE;
+ adjustTZ = true;
}
}
/* dump_mem("\nQPathInfo return data",&findData, sizeof(findData)); */
@@ -703,7 +703,7 @@
} else if (rc == -ENOENT) {
d_drop(direntry);
} else if (rc == -ETXTBSY) {
- int oplock = FALSE;
+ int oplock = 0;
__u16 netfid;
rc = CIFSSMBOpen(xid, pTcon, full_path, FILE_OPEN, DELETE,
@@ -736,7 +736,7 @@
rc = -EOPNOTSUPP;
if (rc == -EOPNOTSUPP) {
- int oplock = FALSE;
+ int oplock = 0;
__u16 netfid;
/* rc = CIFSSMBSetAttrLegacy(xid, pTcon,
full_path,
@@ -774,7 +774,7 @@
if (direntry->d_inode)
drop_nlink(direntry->d_inode);
} else if (rc == -ETXTBSY) {
- int oplock = FALSE;
+ int oplock = 0;
__u16 netfid;
rc = CIFSSMBOpen(xid, pTcon, full_path,
@@ -1149,7 +1149,7 @@
cFYI(1, ("rename rc %d", rc));
if ((rc == -EIO) || (rc == -EEXIST)) {
- int oplock = FALSE;
+ int oplock = 0;
__u16 netfid;
/* BB FIXME Is Generic Read correct for rename? */
@@ -1186,7 +1186,7 @@
struct cifsInodeInfo *cifsInode;
loff_t local_size;
struct timespec local_mtime;
- int invalidate_inode = FALSE;
+ bool invalidate_inode = false;
if (direntry->d_inode == NULL)
return -ENOENT;
@@ -1268,7 +1268,7 @@
only ones who could have modified the file and the
server copy is staler than ours */
} else {
- invalidate_inode = TRUE;
+ invalidate_inode = true;
}
}
@@ -1402,8 +1402,8 @@
int rc = -EACCES;
struct cifsFileInfo *open_file = NULL;
FILE_BASIC_INFO time_buf;
- int set_time = FALSE;
- int set_dosattr = FALSE;
+ bool set_time = false;
+ bool set_dosattr = false;
__u64 mode = 0xFFFFFFFFFFFFFFFFULL;
__u64 uid = 0xFFFFFFFFFFFFFFFFULL;
__u64 gid = 0xFFFFFFFFFFFFFFFFULL;
@@ -1464,7 +1464,7 @@
__u16 nfid = open_file->netfid;
__u32 npid = open_file->pid;
rc = CIFSSMBSetFileSize(xid, pTcon, attrs->ia_size,
- nfid, npid, FALSE);
+ nfid, npid, false);
atomic_dec(&open_file->wrtPending);
cFYI(1, ("SetFSize for attrs rc = %d", rc));
if ((rc == -EINVAL) || (rc == -EOPNOTSUPP)) {
@@ -1484,14 +1484,14 @@
it was found or because there was an error setting
it by handle */
rc = CIFSSMBSetEOF(xid, pTcon, full_path,
- attrs->ia_size, FALSE,
+ attrs->ia_size, false,
cifs_sb->local_nls,
cifs_sb->mnt_cifs_flags &
CIFS_MOUNT_MAP_SPECIAL_CHR);
cFYI(1, ("SetEOF by path (setattrs) rc = %d", rc));
if ((rc == -EINVAL) || (rc == -EOPNOTSUPP)) {
__u16 netfid;
- int oplock = FALSE;
+ int oplock = 0;
rc = SMBLegacyOpen(xid, pTcon, full_path,
FILE_OPEN,
@@ -1516,7 +1516,7 @@
/* Server is ok setting allocation size implicitly - no need
to call:
- CIFSSMBSetEOF(xid, pTcon, full_path, attrs->ia_size, TRUE,
+ CIFSSMBSetEOF(xid, pTcon, full_path, attrs->ia_size, true,
cifs_sb->local_nls);
*/
@@ -1564,7 +1564,7 @@
#endif
/* not writeable */
if ((cifsInode->cifsAttrs & ATTR_READONLY) == 0) {
- set_dosattr = TRUE;
+ set_dosattr = true;
time_buf.Attributes =
cpu_to_le32(cifsInode->cifsAttrs |
ATTR_READONLY);
@@ -1574,28 +1574,24 @@
not be able to write to it - so if any write
bit is enabled for user or group or other we
need to at least try to remove r/o dos attr */
- set_dosattr = TRUE;
+ set_dosattr = true;
time_buf.Attributes = cpu_to_le32(cifsInode->cifsAttrs &
(~ATTR_READONLY));
/* Windows ignores set to zero */
if (time_buf.Attributes == 0)
time_buf.Attributes |= cpu_to_le32(ATTR_NORMAL);
}
-#ifdef CONFIG_CIFS_EXPERIMENTAL
- if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL)
- mode_to_acl(direntry->d_inode, full_path, mode);
-#endif
}
if (attrs->ia_valid & ATTR_ATIME) {
- set_time = TRUE;
+ set_time = true;
time_buf.LastAccessTime =
cpu_to_le64(cifs_UnixTimeToNT(attrs->ia_atime));
} else
time_buf.LastAccessTime = 0;
if (attrs->ia_valid & ATTR_MTIME) {
- set_time = TRUE;
+ set_time = true;
time_buf.LastWriteTime =
cpu_to_le64(cifs_UnixTimeToNT(attrs->ia_mtime));
} else
@@ -1606,7 +1602,7 @@
server times */
if (set_time && (attrs->ia_valid & ATTR_CTIME)) {
- set_time = TRUE;
+ set_time = true;
/* Although Samba throws this field away
it may be useful to Windows - but we do
not want to set ctime unless some other
@@ -1630,7 +1626,7 @@
rc = -EOPNOTSUPP;
if (rc == -EOPNOTSUPP) {
- int oplock = FALSE;
+ int oplock = 0;
__u16 netfid;
cFYI(1, ("calling SetFileInfo since SetPathInfo for "
diff --git a/fs/cifs/link.c b/fs/cifs/link.c
index d4e7ec9..1c2c3ce 100644
--- a/fs/cifs/link.c
+++ b/fs/cifs/link.c
@@ -230,7 +230,7 @@
struct inode *inode = direntry->d_inode;
int rc = -EACCES;
int xid;
- int oplock = FALSE;
+ int oplock = 0;
struct cifs_sb_info *cifs_sb;
struct cifsTconInfo *pTcon;
char *full_path = NULL;
diff --git a/fs/cifs/misc.c b/fs/cifs/misc.c
index 2a42d9f..1d69b80 100644
--- a/fs/cifs/misc.c
+++ b/fs/cifs/misc.c
@@ -496,7 +496,8 @@
}
return 0;
}
-int
+
+bool
is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv)
{
struct smb_com_lock_req *pSMB = (struct smb_com_lock_req *)buf;
@@ -522,17 +523,17 @@
pnotify->Action)); /* BB removeme BB */
/* cifs_dump_mem("Rcvd notify Data: ",buf,
sizeof(struct smb_hdr)+60); */
- return TRUE;
+ return true;
}
if (pSMBr->hdr.Status.CifsError) {
cFYI(1, ("notify err 0x%d",
pSMBr->hdr.Status.CifsError));
- return TRUE;
+ return true;
}
- return FALSE;
+ return false;
}
if (pSMB->hdr.Command != SMB_COM_LOCKING_ANDX)
- return FALSE;
+ return false;
if (pSMB->hdr.Flags & SMBFLG_RESPONSE) {
/* no sense logging error on invalid handle on oplock
break - harmless race between close request and oplock
@@ -541,21 +542,21 @@
if ((NT_STATUS_INVALID_HANDLE) ==
le32_to_cpu(pSMB->hdr.Status.CifsError)) {
cFYI(1, ("invalid handle on oplock break"));
- return TRUE;
+ return true;
} else if (ERRbadfid ==
le16_to_cpu(pSMB->hdr.Status.DosError.Error)) {
- return TRUE;
+ return true;
} else {
- return FALSE; /* on valid oplock brk we get "request" */
+ return false; /* on valid oplock brk we get "request" */
}
}
if (pSMB->hdr.WordCount != 8)
- return FALSE;
+ return false;
cFYI(1, ("oplock type 0x%d level 0x%d",
pSMB->LockType, pSMB->OplockLevel));
if (!(pSMB->LockType & LOCKING_ANDX_OPLOCK_RELEASE))
- return FALSE;
+ return false;
/* look up tcon based on tid & uid */
read_lock(&GlobalSMBSeslock);
@@ -573,11 +574,11 @@
("file id match, oplock break"));
pCifsInode =
CIFS_I(netfile->pInode);
- pCifsInode->clientCanCacheAll = FALSE;
+ pCifsInode->clientCanCacheAll = false;
if (pSMB->OplockLevel == 0)
pCifsInode->clientCanCacheRead
- = FALSE;
- pCifsInode->oplockPending = TRUE;
+ = false;
+ pCifsInode->oplockPending = true;
AllocOplockQEntry(netfile->pInode,
netfile->netfid,
tcon);
@@ -585,17 +586,17 @@
("about to wake up oplock thread"));
if (oplockThread)
wake_up_process(oplockThread);
- return TRUE;
+ return true;
}
}
read_unlock(&GlobalSMBSeslock);
cFYI(1, ("No matching file for oplock break"));
- return TRUE;
+ return true;
}
}
read_unlock(&GlobalSMBSeslock);
cFYI(1, ("Can not process oplock break for non-existent connection"));
- return TRUE;
+ return true;
}
void
diff --git a/fs/cifs/netmisc.c b/fs/cifs/netmisc.c
index 3b5a5ce..00f4cff 100644
--- a/fs/cifs/netmisc.c
+++ b/fs/cifs/netmisc.c
@@ -132,47 +132,17 @@
{0, 0}
};
-
-/* if the mount helper is missing we need to reverse the 1st slash
- from '/' to backslash in order to format the UNC properly for
- ip address parsing and for tree connect (unless the user
- remembered to put the UNC name in properly). Fortunately we do
- not have to call this twice (we check for IPv4 addresses
- first, so it is already converted by the time we
- try IPv6 addresses */
-static int canonicalize_unc(char *cp)
-{
- int i;
-
- for (i = 0; i <= 46 /* INET6_ADDRSTRLEN */ ; i++) {
- if (cp[i] == 0)
- break;
- if (cp[i] == '\\')
- break;
- if (cp[i] == '/') {
- cFYI(DBG2, ("change slash to \\ in malformed UNC"));
- cp[i] = '\\';
- return 1;
- }
- }
- return 0;
-}
-
/* Convert string containing dotted ip address to binary form */
/* returns 0 if invalid address */
int
-cifs_inet_pton(int address_family, char *cp, void *dst)
+cifs_inet_pton(const int address_family, const char *cp, void *dst)
{
int ret = 0;
/* calculate length by finding first slash or NULL */
if (address_family == AF_INET) {
ret = in4_pton(cp, -1 /* len */, dst, '\\', NULL);
- if (ret == 0) {
- if (canonicalize_unc(cp))
- ret = in4_pton(cp, -1, dst, '\\', NULL);
- }
} else if (address_family == AF_INET6) {
ret = in6_pton(cp, -1 /* len */, dst , '\\', NULL);
}
diff --git a/fs/cifs/readdir.c b/fs/cifs/readdir.c
index 32b445e..34ec321 100644
--- a/fs/cifs/readdir.c
+++ b/fs/cifs/readdir.c
@@ -447,8 +447,8 @@
if (file->private_data == NULL)
return -ENOMEM;
cifsFile = file->private_data;
- cifsFile->invalidHandle = TRUE;
- cifsFile->srch_inf.endOfSearch = FALSE;
+ cifsFile->invalidHandle = true;
+ cifsFile->srch_inf.endOfSearch = false;
cifs_sb = CIFS_SB(file->f_path.dentry->d_sb);
if (cifs_sb == NULL)
@@ -485,7 +485,7 @@
cifs_sb->mnt_cifs_flags &
CIFS_MOUNT_MAP_SPECIAL_CHR, CIFS_DIR_SEP(cifs_sb));
if (rc == 0)
- cifsFile->invalidHandle = FALSE;
+ cifsFile->invalidHandle = false;
if ((rc == -EOPNOTSUPP) &&
(cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM)) {
cifs_sb->mnt_cifs_flags &= ~CIFS_MOUNT_SERVER_INUM;
@@ -670,7 +670,7 @@
(index_to_find < first_entry_in_buffer)) {
/* close and restart search */
cFYI(1, ("search backing up - close and restart search"));
- cifsFile->invalidHandle = TRUE;
+ cifsFile->invalidHandle = true;
CIFSFindClose(xid, pTcon, cifsFile->netfid);
kfree(cifsFile->search_resume_name);
cifsFile->search_resume_name = NULL;
@@ -692,7 +692,7 @@
}
while ((index_to_find >= cifsFile->srch_inf.index_of_last_entry) &&
- (rc == 0) && (cifsFile->srch_inf.endOfSearch == FALSE)) {
+ (rc == 0) && !cifsFile->srch_inf.endOfSearch) {
cFYI(1, ("calling findnext2"));
rc = CIFSFindNext(xid, pTcon, cifsFile->netfid,
&cifsFile->srch_inf);
@@ -1038,7 +1038,7 @@
break;
}
} /* else {
- cifsFile->invalidHandle = TRUE;
+ cifsFile->invalidHandle = true;
CIFSFindClose(xid, pTcon, cifsFile->netfid);
}
kfree(cifsFile->search_resume_name);
diff --git a/fs/cifs/smbencrypt.c b/fs/cifs/smbencrypt.c
index 58bbfd9..ff3232f 100644
--- a/fs/cifs/smbencrypt.c
+++ b/fs/cifs/smbencrypt.c
@@ -35,11 +35,11 @@
#include "cifs_debug.h"
#include "cifsencrypt.h"
-#ifndef FALSE
-#define FALSE 0
+#ifndef false
+#define false 0
#endif
-#ifndef TRUE
-#define TRUE 1
+#ifndef true
+#define true 1
#endif
/* following came from the other byteorder.h to avoid include conflicts */
diff --git a/fs/cifs/xattr.c b/fs/cifs/xattr.c
index 8cd6a44..e9527ee 100644
--- a/fs/cifs/xattr.c
+++ b/fs/cifs/xattr.c
@@ -264,7 +264,7 @@
#ifdef CONFIG_CIFS_EXPERIMENTAL
else if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL) {
__u16 fid;
- int oplock = FALSE;
+ int oplock = 0;
struct cifs_ntsd *pacl = NULL;
__u32 buflen = 0;
if (experimEnabled)
diff --git a/include/asm-blackfin/dpmc.h b/include/asm-blackfin/dpmc.h
index 686cf83..7f34cd3 100644
--- a/include/asm-blackfin/dpmc.h
+++ b/include/asm-blackfin/dpmc.h
@@ -1,7 +1,7 @@
/*
* include/asm-blackfin/dpmc.h - Miscellaneous IOCTL commands for Dynamic Power
* Management Controller Driver.
- * Copyright (C) 2004 Analog Device Inc.
+ * Copyright (C) 2004-2008 Analog Device Inc.
*
*/
#ifndef _BLACKFIN_DPMC_H_
@@ -65,6 +65,14 @@
extern unsigned long get_cclk(void);
extern unsigned long get_sclk(void);
+struct bfin_dpmc_platform_data {
+ const unsigned int *tuple_tab;
+ unsigned short tabsize;
+ unsigned short vr_settling_time; /* in us */
+};
+
+#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16))
+
#endif /* __KERNEL__ */
#endif /*_BLACKFIN_DPMC_H_*/
diff --git a/include/asm-blackfin/entry.h b/include/asm-blackfin/entry.h
index 562c6d3..c4f721e 100644
--- a/include/asm-blackfin/entry.h
+++ b/include/asm-blackfin/entry.h
@@ -17,6 +17,11 @@
#define PF_DTRACE_OFF 1
#define PF_DTRACE_BIT 5
+/*
+ * NOTE! The single-stepping code assumes that all interrupt handlers
+ * start by saving SYSCFG on the stack with their first instruction.
+ */
+
/* This one is used for exceptions, emulation, and NMI. It doesn't push
RETI and doesn't do cli. */
#define SAVE_ALL_SYS save_context_no_interrupts
diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
index f0ab273..26e3c80 100644
--- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
@@ -44,10 +44,15 @@
#define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v)
#define UART_PUT_DLL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLL), v)
#define UART_PUT_IER(uart, v) bfin_write16(((uart)->port.membase + OFFSET_IER), v)
+#define UART_SET_IER(uart, v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
+#define UART_CLEAR_IER(uart, v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
#define UART_PUT_DLH(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLH), v)
#define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
#define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v)
+#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
+#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
+
#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
# define CONFIG_SERIAL_BFIN_CTSRTS
diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
index fbe88de..d016603 100644
--- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
@@ -44,10 +44,15 @@
#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
+#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
+#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
+#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
+#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
+
#ifdef CONFIG_BFIN_UART0_CTSRTS
# define CONFIG_SERIAL_BFIN_CTSRTS
# ifndef CONFIG_UART0_CTS_PIN
diff --git a/include/asm-blackfin/mach-bf533/defBF532.h b/include/asm-blackfin/mach-bf533/defBF532.h
index 17e1548..0ab4dd7 100644
--- a/include/asm-blackfin/mach-bf533/defBF532.h
+++ b/include/asm-blackfin/mach-bf533/defBF532.h
@@ -468,6 +468,8 @@
#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */
#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */
#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */
+#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */
+#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */
#define WAKE 0x0100 /* Enable RTC/Reset Wakeup From Hibernate */
#define SCKELOW 0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */
diff --git a/include/asm-blackfin/mach-bf533/irq.h b/include/asm-blackfin/mach-bf533/irq.h
index 832e6f6..5aa38e5 100644
--- a/include/asm-blackfin/mach-bf533/irq.h
+++ b/include/asm-blackfin/mach-bf533/irq.h
@@ -66,12 +66,13 @@
DMA8/9 Interrupt IVG13 28
DMA10/11 Interrupt IVG13 29
Watchdog Timer IVG13 30
- Software Interrupt 1 IVG14 31
- Software Interrupt 2 --
+
+ Softirq IVG14 31
+ System Call --
(lowest priority) IVG15 32 *
*/
-#define SYS_IRQS 32
-#define NR_PERI_INTS 24
+#define SYS_IRQS 31
+#define NR_PERI_INTS 24
/* The ABSTRACT IRQ definitions */
/** the first seven of the following are fixed, the rest you change if you need to **/
@@ -96,7 +97,7 @@
#define IRQ_SPORT0_TX 17 /*DMA2 Interrupt (SPORT0 TX) */
#define IRQ_SPORT1_RX 18 /*DMA3 Interrupt (SPORT1 RX) */
#define IRQ_SPORT1_TX 19 /*DMA4 Interrupt (SPORT1 TX) */
-#define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */
+#define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */
#define IRQ_UART_RX 21 /*DMA6 Interrupt (UART RX) */
#define IRQ_UART_TX 22 /*DMA7 Interrupt (UART TX) */
#define IRQ_TMR0 23 /*Timer 0 */
@@ -108,9 +109,6 @@
#define IRQ_MEM_DMA1 29 /*DMA10/11 Interrupt (Memory DMA Stream 1) */
#define IRQ_WATCH 30 /*Watch Dog Timer */
-#define IRQ_SW_INT1 31 /*Software Int 1 */
-#define IRQ_SW_INT2 32 /*Software Int 2 (reserved for SYSCALL) */
-
#define IRQ_PF0 33
#define IRQ_PF1 34
#define IRQ_PF2 35
diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
index fd100a4..f79d1a0 100644
--- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
@@ -44,10 +44,15 @@
#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
+#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
+#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
+#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
+#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
+
#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
# define CONFIG_SERIAL_BFIN_CTSRTS
diff --git a/include/asm-blackfin/mach-bf537/irq.h b/include/asm-blackfin/mach-bf537/irq.h
index be6f2ff..2e68a8a 100644
--- a/include/asm-blackfin/mach-bf537/irq.h
+++ b/include/asm-blackfin/mach-bf537/irq.h
@@ -34,24 +34,23 @@
/*
* Interrupt source definitions
- Event Source Core Event Name
-Core Emulation **
- Events (highest priority) EMU 0
- Reset RST 1
- NMI NMI 2
- Exception EVX 3
- Reserved -- 4
- Hardware Error IVHW 5
- Core Timer IVTMR 6 *
-
-.....
-
- Software Interrupt 1 IVG14 31
- Software Interrupt 2 --
- (lowest priority) IVG15 32 *
+ * Event Source Core Event Name
+ * Core Emulation **
+ * Events (highest priority) EMU 0
+ * Reset RST 1
+ * NMI NMI 2
+ * Exception EVX 3
+ * Reserved -- 4
+ * Hardware Error IVHW 5
+ * Core Timer IVTMR 6
+ * .....
+ *
+ * Softirq IVG14
+ * System Call --
+ * (lowest priority) IVG15
*/
-#define SYS_IRQS 41
+#define SYS_IRQS 39
#define NR_PERI_INTS 32
/* The ABSTRACT IRQ definitions */
@@ -95,10 +94,8 @@
#define IRQ_PORTG_INTB 35 /* PF Port G (PF15:0) Interrupt B */
#define IRQ_MEM_DMA0 36 /*(Memory DMA Stream 0) */
#define IRQ_MEM_DMA1 37 /*(Memory DMA Stream 1) */
-#define IRQ_PROG_INTB 38 /* PF Ports F (PF15:0) Interrupt B */
+#define IRQ_PROG_INTB 38 /* PF Ports F (PF15:0) Interrupt B */
#define IRQ_WATCH 38 /*Watch Dog Timer */
-#define IRQ_SW_INT1 40 /*Software Int 1 */
-#define IRQ_SW_INT2 41 /*Software Int 2 (reserved for SYSCALL) */
#define IRQ_PPI_ERROR 42 /*PPI Error Interrupt */
#define IRQ_CAN_ERROR 43 /*CAN Error Interrupt */
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
index 6547027..5eb46a7 100644
--- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
@@ -54,6 +54,9 @@
#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v)
+#define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */
+#define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */
+
#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
# define CONFIG_SERIAL_BFIN_CTSRTS
diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h
index 08f90c2..e022e89 100644
--- a/include/asm-blackfin/mach-bf548/defBF54x_base.h
+++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h
@@ -2329,6 +2329,26 @@
#define KPADWE 0x1000 /* Keypad Wake-Up Enable */
#define ROTWE 0x2000 /* Rotary Wake-Up Enable */
+#define FREQ_333 0x0001 /* Switching Frequency Is 333 kHz */
+#define FREQ_667 0x0002 /* Switching Frequency Is 667 kHz */
+#define FREQ_1000 0x0003 /* Switching Frequency Is 1 MHz */
+
+#define GAIN_5 0x0000 /* GAIN = 5*/
+#define GAIN_10 0x0004 /* GAIN = 1*/
+#define GAIN_20 0x0008 /* GAIN = 2*/
+#define GAIN_50 0x000C /* GAIN = 5*/
+
+#define VLEV_085 0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */
+#define VLEV_090 0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */
+#define VLEV_095 0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */
+#define VLEV_100 0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */
+#define VLEV_105 0x00A0 /* VLEV = 1.05 V (-5% - +10% Accuracy) */
+#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */
+#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */
+#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */
+#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */
+#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */
+
/* Bit masks for NFC_CTL */
#define WR_DLY 0xf /* Write Strobe Delay */
diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
index 8a4e66d..7a96287 100644
--- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
@@ -44,10 +44,15 @@
#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
+#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
+#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
+#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
+#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
+
#ifdef CONFIG_BFIN_UART0_CTSRTS
# define CONFIG_SERIAL_BFIN_CTSRTS
# ifndef CONFIG_UART0_CTS_PIN
diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h
index 366c9b9..1ab50e9 100644
--- a/include/asm-blackfin/mach-bf561/defBF561.h
+++ b/include/asm-blackfin/mach-bf561/defBF561.h
@@ -868,6 +868,34 @@
#define CHIPID_FAMILY 0x0FFFF000
#define CHIPID_MANUFACTURE 0x00000FFE
+/* VR_CTL Masks */
+#define FREQ 0x0003 /* Switching Oscillator Frequency For Regulator */
+#define HIBERNATE 0x0000 /* Powerdown/Bypass On-Board Regulation */
+#define FREQ_333 0x0001 /* Switching Frequency Is 333 kHz */
+#define FREQ_667 0x0002 /* Switching Frequency Is 667 kHz */
+#define FREQ_1000 0x0003 /* Switching Frequency Is 1 MHz */
+
+#define GAIN 0x000C /* Voltage Level Gain */
+#define GAIN_5 0x0000 /* GAIN = 5*/
+#define GAIN_10 0x0004 /* GAIN = 1*/
+#define GAIN_20 0x0008 /* GAIN = 2*/
+#define GAIN_50 0x000C /* GAIN = 5*/
+
+#define VLEV 0x00F0 /* Internal Voltage Level */
+#define VLEV_085 0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */
+#define VLEV_090 0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */
+#define VLEV_095 0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */
+#define VLEV_100 0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */
+#define VLEV_105 0x00A0 /* VLEV = 1.05 V (-5% - +10% Accuracy) */
+#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */
+#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */
+#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */
+#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */
+#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */
+
+#define WAKE 0x0100 /* Enable RTC/Reset Wakeup From Hibernate */
+#define SCKELOW 0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */
+
/* PLL_DIV Masks */
#define SCLK_DIV(x) (x) /* SCLK = VCO / x */
diff --git a/include/asm-blackfin/mach-bf561/irq.h b/include/asm-blackfin/mach-bf561/irq.h
index 83f0383..6698389 100644
--- a/include/asm-blackfin/mach-bf561/irq.h
+++ b/include/asm-blackfin/mach-bf561/irq.h
@@ -118,12 +118,13 @@
Supplemental interrupt 0 IVG7 69
supplemental interrupt 1 IVG7 70
- Software Interrupt 1 IVG14 71
- Software Interrupt 2 IVG15 72 *
- (lowest priority)
+ Softirq IVG14
+ System Call --
+ (lowest priority) IVG15
+
**********************************************************************/
-#define SYS_IRQS 72
+#define SYS_IRQS 71
#define NR_PERI_INTS 64
/*
@@ -237,9 +238,7 @@
#define IRQ_RESERVED_2 (IVG_BASE + 61) /* Reserved interrupt */
#define IRQ_SUPPLE_0 (IVG_BASE + 62) /* Supplemental interrupt 0 */
#define IRQ_SUPPLE_1 (IVG_BASE + 63) /* supplemental interrupt 1 */
-#define IRQ_SW_INT1 71 /* Software Interrupt 1 */
-#define IRQ_SW_INT2 72 /* Software Interrupt 2 */
- /* reserved for SYSCALL */
+
#define IRQ_PF0 73
#define IRQ_PF1 74
#define IRQ_PF2 75
diff --git a/include/asm-blackfin/mach-common/context.S b/include/asm-blackfin/mach-common/context.S
index fd0ebe1..c0e630e 100644
--- a/include/asm-blackfin/mach-common/context.S
+++ b/include/asm-blackfin/mach-common/context.S
@@ -28,6 +28,11 @@
*/
/*
+ * NOTE! The single-stepping code assumes that all interrupt handlers
+ * start by saving SYSCFG on the stack with their first instruction.
+ */
+
+/*
* Code to save processor context.
* We even save the register which are preserved by a function call
* - r4, r5, r6, r7, p3, p4, p5
diff --git a/include/asm-blackfin/time.h b/include/asm-blackfin/time.h
index 6e5859b..ddc43ce 100644
--- a/include/asm-blackfin/time.h
+++ b/include/asm-blackfin/time.h
@@ -24,6 +24,8 @@
#ifndef CONFIG_CPU_FREQ
#define TIME_SCALE 1
+#define __bfin_cycles_off (0)
+#define __bfin_cycles_mod (0)
#else
/*
* Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 .
@@ -31,6 +33,8 @@
* adjust the Core Timer Presale Register. This way we don't lose time.
*/
#define TIME_SCALE 4
+extern unsigned long long __bfin_cycles_off;
+extern unsigned int __bfin_cycles_mod;
#endif
#endif
diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h
index 7c97b5a..c08e714 100644
--- a/include/asm-powerpc/pgtable-ppc32.h
+++ b/include/asm-powerpc/pgtable-ppc32.h
@@ -209,6 +209,13 @@
* 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
* - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR
*
+ * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional
+ * TLB2 storage attibute fields. Those are:
+ *
+ * TLB2:
+ * 0...10 11 12 13 14 15 16...31
+ * no change WL1 IL1I IL1D IL2I IL2D no change
+ *
* There are some constrains and options, to decide mapping software bits
* into TLB entry.
*
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index e3c845b..6abead6 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -100,6 +100,7 @@
/* Flag indicating progress during context switch. */
#define SPU_CONTEXT_SWITCH_PENDING 0UL
+#define SPU_CONTEXT_FAULT_PENDING 1UL
struct spu_context;
struct spu_runqueue;
@@ -128,9 +129,11 @@
unsigned int irqs[3];
u32 node;
u64 flags;
- u64 dar;
- u64 dsisr;
u64 class_0_pending;
+ u64 class_0_dar;
+ u64 class_0_dsisr;
+ u64 class_1_dar;
+ u64 class_1_dsisr;
size_t ls_size;
unsigned int slb_replace;
struct mm_struct *mm;
@@ -143,7 +146,7 @@
void (* wbox_callback)(struct spu *spu);
void (* ibox_callback)(struct spu *spu);
- void (* stop_callback)(struct spu *spu);
+ void (* stop_callback)(struct spu *spu, int irq);
void (* mfc_callback)(struct spu *spu);
char irq_c0[8];
diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h
index 0ab6bff..129ec14 100644
--- a/include/asm-powerpc/spu_csa.h
+++ b/include/asm-powerpc/spu_csa.h
@@ -254,7 +254,8 @@
u64 spu_chnldata_RW[32];
u32 spu_mailbox_data[4];
u32 pu_mailbox_data[1];
- u64 dar, dsisr, class_0_pending;
+ u64 class_0_dar, class_0_dsisr, class_0_pending;
+ u64 class_1_dar, class_1_dsisr;
unsigned long suspend_time;
spinlock_t register_lock;
};
diff --git a/include/asm-sh/cpu-sh3/dma.h b/include/asm-sh/cpu-sh3/dma.h
index 092ff9d..6813c32 100644
--- a/include/asm-sh/cpu-sh3/dma.h
+++ b/include/asm-sh/cpu-sh3/dma.h
@@ -3,19 +3,19 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
- defined(CONFIG_CPU_SUBTYPE_SH7721) || \
- defined(CONFIG_CPU_SUBTYPE_SH7709)
+ defined(CONFIG_CPU_SUBTYPE_SH7721)
#define SH_DMAC_BASE 0xa4010020
+#else
+#define SH_DMAC_BASE 0xa4000020
+#endif
+#if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7709)
#define DMTE0_IRQ 48
#define DMTE1_IRQ 49
#define DMTE2_IRQ 50
#define DMTE3_IRQ 51
#define DMTE4_IRQ 76
#define DMTE5_IRQ 77
-
-#else
-#define SH_DMAC_BASE 0xa4000020
#endif
/* Definitions for the SuperH DMAC */
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h
index c958fda..7438d1e 100644
--- a/include/asm-sh/hw_irq.h
+++ b/include/asm-sh/hw_irq.h
@@ -79,6 +79,10 @@
struct intc_sense_reg *sense_regs;
unsigned int nr_sense_regs;
char *name;
+#ifdef CONFIG_CPU_SH3
+ struct intc_mask_reg *ack_regs;
+ unsigned int nr_ack_regs;
+#endif
};
#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
@@ -91,10 +95,25 @@
chipname, \
}
+#ifdef CONFIG_CPU_SH3
+#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
+ mask_regs, prio_regs, sense_regs, ack_regs) \
+struct intc_desc symbol __initdata = { \
+ _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
+ _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
+ _INTC_ARRAY(sense_regs), \
+ chipname, \
+ _INTC_ARRAY(ack_regs), \
+}
+#endif
+
void __init register_intc_controller(struct intc_desc *desc);
int intc_set_priority(unsigned int irq, unsigned int prio);
void __init plat_irq_setup(void);
+#ifdef CONFIG_CPU_SH3
+void __init plat_irq_setup_sh3(void);
+#endif
enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h
index 356e50d..a4fbf0c 100644
--- a/include/asm-sh/io.h
+++ b/include/asm-sh/io.h
@@ -268,11 +268,6 @@
unsigned long long poke_real_address_q(unsigned long long addr,
unsigned long long val);
-/* arch/sh/mm/ioremap_64.c */
-unsigned long onchip_remap(unsigned long addr, unsigned long size,
- const char *name);
-extern void onchip_unmap(unsigned long vaddr);
-
#if !defined(CONFIG_MMU)
#define virt_to_phys(address) ((unsigned long)(address))
#define phys_to_virt(address) ((void *)(address))
@@ -302,9 +297,16 @@
void __iomem *__ioremap(unsigned long offset, unsigned long size,
unsigned long flags);
void __iounmap(void __iomem *addr);
+
+/* arch/sh/mm/ioremap_64.c */
+unsigned long onchip_remap(unsigned long addr, unsigned long size,
+ const char *name);
+extern void onchip_unmap(unsigned long vaddr);
#else
#define __ioremap(offset, size, flags) ((void __iomem *)(offset))
#define __iounmap(addr) do { } while (0)
+#define onchip_remap(addr, size, name) (addr)
+#define onchip_unmap(addr) do { } while (0)
#endif /* CONFIG_MMU */
static inline void __iomem *
diff --git a/include/asm-sh/keyboard.h b/include/asm-sh/keyboard.h
deleted file mode 100644
index 31dcc4f..0000000
--- a/include/asm-sh/keyboard.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __ASM_SH_KEYBOARD_H
-#define __ASM_SH_KEYBOARD_H
-/*
- * $Id: keyboard.h,v 1.1.1.1 2001/10/15 20:45:09 mrbrown Exp $
- */
-
-#include <linux/kd.h>
-#include <asm/machvec.h>
-
-#ifdef CONFIG_SH_MPC1211
-#include <asm/mpc1211/keyboard-mpc1211.h>
-#endif
-#endif
diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h
index fe58d00..87e812f 100644
--- a/include/asm-sh/mmu_context.h
+++ b/include/asm-sh/mmu_context.h
@@ -27,6 +27,7 @@
/* ASID is 8-bit value, so it can't be 0x100 */
#define MMU_NO_ASID 0x100
+#ifdef CONFIG_MMU
#define asid_cache(cpu) (cpu_data[cpu].asid_cache)
#define cpu_context(cpu, mm) ((mm)->context.id[cpu])
@@ -38,7 +39,6 @@
*/
#define MMU_VPN_MASK 0xfffff000
-#ifdef CONFIG_MMU
#if defined(CONFIG_SUPERH32)
#include "mmu_context_32.h"
#else
@@ -129,6 +129,8 @@
#define destroy_context(mm) do { } while (0)
#define set_asid(asid) do { } while (0)
#define get_asid() (0)
+#define cpu_asid(cpu, mm) ({ (void)cpu; 0; })
+#define switch_and_save_asid(asid) (0)
#define set_TTB(pgd) do { } while (0)
#define get_TTB() (0)
#define activate_context(mm,cpu) do { } while (0)
diff --git a/include/asm-sh/mmzone.h b/include/asm-sh/mmzone.h
index 7969f38..2969253 100644
--- a/include/asm-sh/mmzone.h
+++ b/include/asm-sh/mmzone.h
@@ -41,6 +41,8 @@
/* arch/sh/kernel/setup.c */
void __init setup_bootmem_allocator(unsigned long start_pfn);
+void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
+ unsigned long end_pfn);
#endif /* __KERNEL__ */
#endif /* __ASM_SH_MMZONE_H */
diff --git a/include/asm-sh/mpc1211/dma.h b/include/asm-sh/mpc1211/dma.h
deleted file mode 100644
index e506d1a..0000000
--- a/include/asm-sh/mpc1211/dma.h
+++ /dev/null
@@ -1,303 +0,0 @@
-/* $Id: dma.h,v 1.7 1992/12/14 00:29:34 root Exp root $
- * linux/include/asm/dma.h: Defines for using and allocating dma channels.
- * Written by Hennus Bergman, 1992.
- * High DMA channel support & info by Hannu Savolainen
- * and John Boyd, Nov. 1992.
- */
-
-#ifndef _ASM_MPC1211_DMA_H
-#define _ASM_MPC1211_DMA_H
-
-#include <linux/spinlock.h> /* And spinlocks */
-#include <asm/io.h> /* need byte IO */
-#include <linux/delay.h>
-
-
-#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
-#define dma_outb outb_p
-#else
-#define dma_outb outb
-#endif
-
-#define dma_inb inb
-
-/*
- * NOTES about DMA transfers:
- *
- * controller 1: channels 0-3, byte operations, ports 00-1F
- * controller 2: channels 4-7, word operations, ports C0-DF
- *
- * - ALL registers are 8 bits only, regardless of transfer size
- * - channel 4 is not used - cascades 1 into 2.
- * - channels 0-3 are byte - addresses/counts are for physical bytes
- * - channels 5-7 are word - addresses/counts are for physical words
- * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
- * - transfer count loaded to registers is 1 less than actual count
- * - controller 2 offsets are all even (2x offsets for controller 1)
- * - page registers for 5-7 don't use data bit 0, represent 128K pages
- * - page registers for 0-3 use bit 0, represent 64K pages
- *
- * DMA transfers are limited to the lower 16MB of _physical_ memory.
- * Note that addresses loaded into registers must be _physical_ addresses,
- * not logical addresses (which may differ if paging is active).
- *
- * Address mapping for channels 0-3:
- *
- * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses)
- * | ... | | ... | | ... |
- * | ... | | ... | | ... |
- * | ... | | ... | | ... |
- * P7 ... P0 A7 ... A0 A7 ... A0
- * | Page | Addr MSB | Addr LSB | (DMA registers)
- *
- * Address mapping for channels 5-7:
- *
- * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses)
- * | ... | \ \ ... \ \ \ ... \ \
- * | ... | \ \ ... \ \ \ ... \ (not used)
- * | ... | \ \ ... \ \ \ ... \
- * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0
- * | Page | Addr MSB | Addr LSB | (DMA registers)
- *
- * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
- * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
- * the hardware level, so odd-byte transfers aren't possible).
- *
- * Transfer count (_not # bytes_) is limited to 64K, represented as actual
- * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more,
- * and up to 128K bytes may be transferred on channels 5-7 in one operation.
- *
- */
-
-#define MAX_DMA_CHANNELS 8
-
-/* The maximum address that we can perform a DMA transfer to on this platform */
-#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000)
-
-/* 8237 DMA controllers */
-#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
-#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */
-
-/* DMA controller registers */
-#define DMA1_CMD_REG 0x08 /* command register (w) */
-#define DMA1_STAT_REG 0x08 /* status register (r) */
-#define DMA1_REQ_REG 0x09 /* request register (w) */
-#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
-#define DMA1_MODE_REG 0x0B /* mode register (w) */
-#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */
-#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */
-#define DMA1_RESET_REG 0x0D /* Master Clear (w) */
-#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */
-#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */
-
-#define DMA2_CMD_REG 0xD0 /* command register (w) */
-#define DMA2_STAT_REG 0xD0 /* status register (r) */
-#define DMA2_REQ_REG 0xD2 /* request register (w) */
-#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */
-#define DMA2_MODE_REG 0xD6 /* mode register (w) */
-#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */
-#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */
-#define DMA2_RESET_REG 0xDA /* Master Clear (w) */
-#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */
-#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */
-
-#define DMA_ADDR_0 0x00 /* DMA address registers */
-#define DMA_ADDR_1 0x02
-#define DMA_ADDR_2 0x04
-#define DMA_ADDR_3 0x06
-#define DMA_ADDR_4 0xC0
-#define DMA_ADDR_5 0xC4
-#define DMA_ADDR_6 0xC8
-#define DMA_ADDR_7 0xCC
-
-#define DMA_CNT_0 0x01 /* DMA count registers */
-#define DMA_CNT_1 0x03
-#define DMA_CNT_2 0x05
-#define DMA_CNT_3 0x07
-#define DMA_CNT_4 0xC2
-#define DMA_CNT_5 0xC6
-#define DMA_CNT_6 0xCA
-#define DMA_CNT_7 0xCE
-
-#define DMA_PAGE_0 0x87 /* DMA page registers */
-#define DMA_PAGE_1 0x83
-#define DMA_PAGE_2 0x81
-#define DMA_PAGE_3 0x82
-#define DMA_PAGE_5 0x8B
-#define DMA_PAGE_6 0x89
-#define DMA_PAGE_7 0x8A
-
-#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
-#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
-#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
-
-#define DMA_AUTOINIT 0x10
-
-
-extern spinlock_t dma_spin_lock;
-
-static __inline__ unsigned long claim_dma_lock(void)
-{
- unsigned long flags;
- spin_lock_irqsave(&dma_spin_lock, flags);
- return flags;
-}
-
-static __inline__ void release_dma_lock(unsigned long flags)
-{
- spin_unlock_irqrestore(&dma_spin_lock, flags);
-}
-
-/* enable/disable a specific DMA channel */
-static __inline__ void enable_dma(unsigned int dmanr)
-{
- if (dmanr<=3)
- dma_outb(dmanr, DMA1_MASK_REG);
- else
- dma_outb(dmanr & 3, DMA2_MASK_REG);
-}
-
-static __inline__ void disable_dma(unsigned int dmanr)
-{
- if (dmanr<=3)
- dma_outb(dmanr | 4, DMA1_MASK_REG);
- else
- dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
-}
-
-/* Clear the 'DMA Pointer Flip Flop'.
- * Write 0 for LSB/MSB, 1 for MSB/LSB access.
- * Use this once to initialize the FF to a known state.
- * After that, keep track of it. :-)
- * --- In order to do that, the DMA routines below should ---
- * --- only be used while holding the DMA lock ! ---
- */
-static __inline__ void clear_dma_ff(unsigned int dmanr)
-{
- if (dmanr<=3)
- dma_outb(0, DMA1_CLEAR_FF_REG);
- else
- dma_outb(0, DMA2_CLEAR_FF_REG);
-}
-
-/* set mode (above) for a specific DMA channel */
-static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
-{
- if (dmanr<=3)
- dma_outb(mode | dmanr, DMA1_MODE_REG);
- else
- dma_outb(mode | (dmanr&3), DMA2_MODE_REG);
-}
-
-/* Set only the page register bits of the transfer address.
- * This is used for successive transfers when we know the contents of
- * the lower 16 bits of the DMA current address register, but a 64k boundary
- * may have been crossed.
- */
-static __inline__ void set_dma_page(unsigned int dmanr, unsigned int pagenr)
-{
- switch(dmanr) {
- case 0:
- dma_outb( pagenr & 0xff, DMA_PAGE_0);
- dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_0 + 0x400);
- break;
- case 1:
- dma_outb( pagenr & 0xff, DMA_PAGE_1);
- dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_1 + 0x400);
- break;
- case 2:
- dma_outb( pagenr & 0xff, DMA_PAGE_2);
- dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_2 + 0x400);
- break;
- case 3:
- dma_outb( pagenr & 0xff, DMA_PAGE_3);
- dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_3 + 0x400);
- break;
- case 5:
- dma_outb( pagenr & 0xfe, DMA_PAGE_5);
- dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_5 + 0x400);
- break;
- case 6:
- dma_outb( pagenr & 0xfe, DMA_PAGE_6);
- dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_6 + 0x400);
- break;
- case 7:
- dma_outb( pagenr & 0xfe, DMA_PAGE_7);
- dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_7 + 0x400);
- break;
- }
-}
-
-
-/* Set transfer address & page bits for specific DMA channel.
- * Assumes dma flipflop is clear.
- */
-static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
-{
- set_dma_page(dmanr, a>>16);
- if (dmanr <= 3) {
- dma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
- dma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
- } else {
- dma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
- dma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
- }
-}
-
-
-/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
- * a specific DMA channel.
- * You must ensure the parameters are valid.
- * NOTE: from a manual: "the number of transfers is one more
- * than the initial word count"! This is taken into account.
- * Assumes dma flip-flop is clear.
- * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
- */
-static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
-{
- count--;
- if (dmanr <= 3) {
- dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
- dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
- } else {
- dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
- dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
- }
-}
-
-
-/* Get DMA residue count. After a DMA transfer, this
- * should return zero. Reading this while a DMA transfer is
- * still in progress will return unpredictable results.
- * If called before the channel has been used, it may return 1.
- * Otherwise, it returns the number of _bytes_ left to transfer.
- *
- * Assumes DMA flip-flop is clear.
- */
-static __inline__ int get_dma_residue(unsigned int dmanr)
-{
- unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
- : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
-
- /* using short to get 16-bit wrap around */
- unsigned short count;
-
- count = 1 + dma_inb(io_port);
- count += dma_inb(io_port) << 8;
- return (dmanr<=3)? count : (count<<1);
-}
-
-
-/* These are in kernel/dma.c: */
-extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */
-extern void free_dma(unsigned int dmanr); /* release it again */
-
-/* From PCI */
-
-#ifdef CONFIG_PCI
-extern int isa_dma_bridge_buggy;
-#else
-#define isa_dma_bridge_buggy (0)
-#endif
-
-#endif /* _ASM_MPC1211_DMA_H */
diff --git a/include/asm-sh/mpc1211/io.h b/include/asm-sh/mpc1211/io.h
deleted file mode 100644
index 6298370..0000000
--- a/include/asm-sh/mpc1211/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * include/asm-sh/mpc1211/io.h
- *
- * Copyright 2001 Saito.K & Jeanne
- *
- * IO functions for an Interface MPC-1211
- */
-
-#ifndef _ASM_SH_IO_MPC1211_H
-#define _ASM_SH_IO_MPC1211_H
-
-#include <linux/time.h>
-
-extern int mpc1211_irq_demux(int irq);
-
-extern void init_mpc1211_IRQ(void);
-extern void heartbeat_mpc1211(void);
-
-extern void mpc1211_rtc_gettimeofday(struct timeval *tv);
-extern int mpc1211_rtc_settimeofday(const struct timeval *tv);
-
-#endif /* _ASM_SH_IO_MPC1211_H */
diff --git a/include/asm-sh/mpc1211/keyboard.h b/include/asm-sh/mpc1211/keyboard.h
deleted file mode 100644
index 9020fee..0000000
--- a/include/asm-sh/mpc1211/keyboard.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * MPC1211 specific keybord definitions
- * Taken from the old asm-i386/keybord.h for PC/AT-style definitions
- * created 3 Nov 1996 by Geert Uytterhoeven.
- */
-
-#ifdef __KERNEL__
-
-#include <linux/kernel.h>
-#include <linux/ioport.h>
-#include <linux/kd.h>
-#include <linux/pm.h>
-#include <asm/io.h>
-
-#define KEYBOARD_IRQ 1
-#define DISABLE_KBD_DURING_INTERRUPTS 0
-
-extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);
-extern int pckbd_getkeycode(unsigned int scancode);
-extern int pckbd_translate(unsigned char scancode, unsigned char *keycode,
- char raw_mode);
-extern char pckbd_unexpected_up(unsigned char keycode);
-extern void pckbd_leds(unsigned char leds);
-extern void pckbd_init_hw(void);
-extern int pckbd_pm_resume(struct pm_dev *, pm_request_t, void *);
-extern pm_callback pm_kbd_request_override;
-
-#define kbd_setkeycode pckbd_setkeycode
-#define kbd_getkeycode pckbd_getkeycode
-#define kbd_translate pckbd_translate
-#define kbd_unexpected_up pckbd_unexpected_up
-#define kbd_leds pckbd_leds
-#define kbd_init_hw pckbd_init_hw
-
-/* resource allocation */
-#define kbd_request_region()
-#define kbd_request_irq(handler) request_irq(KEYBOARD_IRQ, handler, 0, \
- "keyboard", NULL)
-
-/* How to access the keyboard macros on this platform. */
-#define kbd_read_input() inb(KBD_DATA_REG)
-#define kbd_read_status() inb(KBD_STATUS_REG)
-#define kbd_write_output(val) outb(val, KBD_DATA_REG)
-#define kbd_write_command(val) outb(val, KBD_CNTL_REG)
-
-/* Some stoneage hardware needs delays after some operations. */
-#define kbd_pause() do { } while(0)
-
-/*
- * Machine specific bits for the PS/2 driver
- */
-
-#define AUX_IRQ 12
-
-#define aux_request_irq(hand, dev_id) \
- request_irq(AUX_IRQ, hand, IRQF_SHARED, "PS2 Mouse", dev_id)
-
-#define aux_free_irq(dev_id) free_irq(AUX_IRQ, dev_id)
-
-#endif /* __KERNEL__ */
diff --git a/include/asm-sh/mpc1211/m1543c.h b/include/asm-sh/mpc1211/m1543c.h
deleted file mode 100644
index c95d132..0000000
--- a/include/asm-sh/mpc1211/m1543c.h
+++ /dev/null
@@ -1,200 +0,0 @@
-#ifndef __ASM_SH_M1543C_H
-#define __ASM_SH_M1543C_H
-
-/*
- * linux/include/asm-sh/m1543c.h
- * Copyright (C) 2001 Nobuhiro Sakawa
- * M1543C:PCI-ISA Bus Bridge with Super IO Chip support
- *
- * from
- *
- * linux/include/asm-sh/smc37c93x.h
- *
- * Copyright (C) 2000 Kazumoto Kojima
- *
- * SMSC 37C93x Super IO Chip support
- */
-
-/* Default base I/O address */
-#define FDC_PRIMARY_BASE 0x3f0
-#define IDE1_PRIMARY_BASE 0x1f0
-#define IDE1_SECONDARY_BASE 0x170
-#define PARPORT_PRIMARY_BASE 0x378
-#define COM1_PRIMARY_BASE 0x2f8
-#define COM2_PRIMARY_BASE 0x3f8
-#define COM3_PRIMARY_BASE 0x3e8
-#define RTC_PRIMARY_BASE 0x070
-#define KBC_PRIMARY_BASE 0x060
-#define AUXIO_PRIMARY_BASE 0x000 /* XXX */
-#define I8259_M_CR 0x20
-#define I8259_M_MR 0x21
-#define I8259_S_CR 0xa0
-#define I8259_S_MR 0xa1
-
-/* Logical device number */
-#define LDN_FDC 0
-#define LDN_IDE1 1
-#define LDN_IDE2 2
-#define LDN_PARPORT 3
-#define LDN_COM1 4
-#define LDN_COM2 5
-#define LDN_COM3 11
-#define LDN_RTC 6
-#define LDN_KBC 7
-
-/* Configuration port and key */
-#define CONFIG_PORT 0x3f0
-#define INDEX_PORT CONFIG_PORT
-#define DATA_PORT 0x3f1
-#define CONFIG_ENTER1 0x51
-#define CONFIG_ENTER2 0x23
-#define CONFIG_EXIT 0xbb
-
-/* Configuration index */
-#define CURRENT_LDN_INDEX 0x07
-#define POWER_CONTROL_INDEX 0x22
-#define ACTIVATE_INDEX 0x30
-#define IO_BASE_HI_INDEX 0x60
-#define IO_BASE_LO_INDEX 0x61
-#define IRQ_SELECT_INDEX 0x70
-#define PS2_IRQ_INDEX 0x72
-#define DMA_SELECT_INDEX 0x74
-
-/* UART stuff. Only for debugging. */
-/* UART Register */
-
-#define UART_RBR 0x0 /* Receiver Buffer Register (Read Only) */
-#define UART_THR 0x0 /* Transmitter Holding Register (Write Only) */
-#define UART_IER 0x2 /* Interrupt Enable Register */
-#define UART_IIR 0x4 /* Interrupt Ident Register (Read Only) */
-#define UART_FCR 0x4 /* FIFO Control Register (Write Only) */
-#define UART_LCR 0x6 /* Line Control Register */
-#define UART_MCR 0x8 /* MODEM Control Register */
-#define UART_LSR 0xa /* Line Status Register */
-#define UART_MSR 0xc /* MODEM Status Register */
-#define UART_SCR 0xe /* Scratch Register */
-#define UART_DLL 0x0 /* Divisor Latch (LS) */
-#define UART_DLM 0x2 /* Divisor Latch (MS) */
-
-#ifndef __ASSEMBLY__
-typedef struct uart_reg {
- volatile __u16 rbr;
- volatile __u16 ier;
- volatile __u16 iir;
- volatile __u16 lcr;
- volatile __u16 mcr;
- volatile __u16 lsr;
- volatile __u16 msr;
- volatile __u16 scr;
-} uart_reg;
-#endif /* ! __ASSEMBLY__ */
-
-/* Alias for Write Only Register */
-
-#define thr rbr
-#define tcr iir
-
-/* Alias for Divisor Latch Register */
-
-#define dll rbr
-#define dlm ier
-#define fcr iir
-
-/* Interrupt Enable Register */
-
-#define IER_ERDAI 0x0100 /* Enable Received Data Available Interrupt */
-#define IER_ETHREI 0x0200 /* Enable Transmitter Holding Register Empty Interrupt */
-#define IER_ELSI 0x0400 /* Enable Receiver Line Status Interrupt */
-#define IER_EMSI 0x0800 /* Enable MODEM Status Interrupt */
-
-/* Interrupt Ident Register */
-
-#define IIR_IP 0x0100 /* "0" if Interrupt Pending */
-#define IIR_IIB0 0x0200 /* Interrupt ID Bit 0 */
-#define IIR_IIB1 0x0400 /* Interrupt ID Bit 1 */
-#define IIR_IIB2 0x0800 /* Interrupt ID Bit 2 */
-#define IIR_FIFO 0xc000 /* FIFOs enabled */
-
-/* FIFO Control Register */
-
-#define FCR_FEN 0x0100 /* FIFO enable */
-#define FCR_RFRES 0x0200 /* Receiver FIFO reset */
-#define FCR_TFRES 0x0400 /* Transmitter FIFO reset */
-#define FCR_DMA 0x0800 /* DMA mode select */
-#define FCR_RTL 0x4000 /* Receiver triger (LSB) */
-#define FCR_RTM 0x8000 /* Receiver triger (MSB) */
-
-/* Line Control Register */
-
-#define LCR_WLS0 0x0100 /* Word Length Select Bit 0 */
-#define LCR_WLS1 0x0200 /* Word Length Select Bit 1 */
-#define LCR_STB 0x0400 /* Number of Stop Bits */
-#define LCR_PEN 0x0800 /* Parity Enable */
-#define LCR_EPS 0x1000 /* Even Parity Select */
-#define LCR_SP 0x2000 /* Stick Parity */
-#define LCR_SB 0x4000 /* Set Break */
-#define LCR_DLAB 0x8000 /* Divisor Latch Access Bit */
-
-/* MODEM Control Register */
-
-#define MCR_DTR 0x0100 /* Data Terminal Ready */
-#define MCR_RTS 0x0200 /* Request to Send */
-#define MCR_OUT1 0x0400 /* Out 1 */
-#define MCR_IRQEN 0x0800 /* IRQ Enable */
-#define MCR_LOOP 0x1000 /* Loop */
-
-/* Line Status Register */
-
-#define LSR_DR 0x0100 /* Data Ready */
-#define LSR_OE 0x0200 /* Overrun Error */
-#define LSR_PE 0x0400 /* Parity Error */
-#define LSR_FE 0x0800 /* Framing Error */
-#define LSR_BI 0x1000 /* Break Interrupt */
-#define LSR_THRE 0x2000 /* Transmitter Holding Register Empty */
-#define LSR_TEMT 0x4000 /* Transmitter Empty */
-#define LSR_FIFOE 0x8000 /* Receiver FIFO error */
-
-/* MODEM Status Register */
-
-#define MSR_DCTS 0x0100 /* Delta Clear to Send */
-#define MSR_DDSR 0x0200 /* Delta Data Set Ready */
-#define MSR_TERI 0x0400 /* Trailing Edge Ring Indicator */
-#define MSR_DDCD 0x0800 /* Delta Data Carrier Detect */
-#define MSR_CTS 0x1000 /* Clear to Send */
-#define MSR_DSR 0x2000 /* Data Set Ready */
-#define MSR_RI 0x4000 /* Ring Indicator */
-#define MSR_DCD 0x8000 /* Data Carrier Detect */
-
-/* Baud Rate Divisor */
-
-#define UART_CLK (1843200) /* 1.8432 MHz */
-#define UART_BAUD(x) (UART_CLK / (16 * (x)))
-
-/* RTC register definition */
-#define RTC_SECONDS 0
-#define RTC_SECONDS_ALARM 1
-#define RTC_MINUTES 2
-#define RTC_MINUTES_ALARM 3
-#define RTC_HOURS 4
-#define RTC_HOURS_ALARM 5
-#define RTC_DAY_OF_WEEK 6
-#define RTC_DAY_OF_MONTH 7
-#define RTC_MONTH 8
-#define RTC_YEAR 9
-#define RTC_FREQ_SELECT 10
-# define RTC_UIP 0x80
-# define RTC_DIV_CTL 0x70
-/* This RTC can work under 32.768KHz clock only. */
-# define RTC_OSC_ENABLE 0x20
-# define RTC_OSC_DISABLE 0x00
-#define RTC_CONTROL 11
-# define RTC_SET 0x80
-# define RTC_PIE 0x40
-# define RTC_AIE 0x20
-# define RTC_UIE 0x10
-# define RTC_SQWE 0x08
-# define RTC_DM_BINARY 0x04
-# define RTC_24H 0x02
-# define RTC_DST_EN 0x01
-
-#endif /* __ASM_SH_M1543C_H */
diff --git a/include/asm-sh/mpc1211/mc146818rtc.h b/include/asm-sh/mpc1211/mc146818rtc.h
deleted file mode 100644
index e245f2a..0000000
--- a/include/asm-sh/mpc1211/mc146818rtc.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/*
- * MPC1211 uses PC/AT style RTC definitions.
- */
-#include <asm-x86/mc146818rtc_32.h>
-
-
diff --git a/include/asm-sh/mpc1211/mpc1211.h b/include/asm-sh/mpc1211/mpc1211.h
deleted file mode 100644
index fa456c3..0000000
--- a/include/asm-sh/mpc1211/mpc1211.h
+++ /dev/null
@@ -1,18 +0,0 @@
-#ifndef __ASM_SH_MPC1211_H
-#define __ASM_SH_MPC1211_H
-
-/*
- * linux/include/asm-sh/mpc1211.h
- *
- * Copyright (C) 2001 Saito.K & Jeanne
- *
- * Interface MPC-1211 support
- */
-
-#define PA_PCI_IO (0xa4000000) /* PCI I/O space */
-#define PA_PCI_MEM (0xb0000000) /* PCI MEM space */
-
-#define PCIPAR (0xa4000cf8) /* PCI Config address */
-#define PCIPDR (0xa4000cfc) /* PCI Config data */
-
-#endif /* __ASM_SH_MPC1211_H */
diff --git a/include/asm-sh/mpc1211/pci.h b/include/asm-sh/mpc1211/pci.h
deleted file mode 100644
index d9162c5..0000000
--- a/include/asm-sh/mpc1211/pci.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Low-Level PCI Support for MPC-1211
- *
- * (c) 2002 Saito.K & Jeanne
- *
- */
-
-#ifndef _PCI_MPC1211_H_
-#define _PCI_MPC1211_H_
-
-#include <linux/pci.h>
-
-/* set debug level 4=verbose...1=terse */
-//#define DEBUG_PCI 3
-#undef DEBUG_PCI
-
-#ifdef DEBUG_PCI
-#define PCIDBG(n, x...) { if(DEBUG_PCI>=n) printk(x); }
-#else
-#define PCIDBG(n, x...)
-#endif
-
-/* startup values */
-#define PCI_PROBE_BIOS 1
-#define PCI_PROBE_CONF1 2
-#define PCI_PROBE_CONF2 4
-#define PCI_NO_CHECKS 0x400
-#define PCI_ASSIGN_ROMS 0x1000
-#define PCI_BIOS_IRQ_SCAN 0x2000
-
-/* MPC-1211 Specific Values */
-#define PCIPAR (0xa4000cf8) /* PCI Config address */
-#define PCIPDR (0xa4000cfc) /* PCI Config data */
-
-#define PA_PCI_IO (0xa4000000) /* PCI I/O space */
-#define PA_PCI_MEM (0xb0000000) /* PCI MEM space */
-
-#endif /* _PCI_MPC1211_H_ */
diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h
index a33838f..306f735 100644
--- a/include/asm-sh/r7780rp.h
+++ b/include/asm-sh/r7780rp.h
@@ -193,8 +193,6 @@
#define IRQ_SCIF0 (HL_FPGA_IRQ_BASE + 15)
#define IRQ_SCIF1 (HL_FPGA_IRQ_BASE + 16)
-unsigned char *highlander_init_irq_r7780mp(void);
-unsigned char *highlander_init_irq_r7780rp(void);
-unsigned char *highlander_init_irq_r7785rp(void);
+unsigned char *highlander_plat_irq_setup(void);
#endif /* __ASM_SH_RENESAS_R7780RP */
diff --git a/include/asm-sh/tlb_64.h b/include/asm-sh/tlb_64.h
index 0308e05..0a96f3a 100644
--- a/include/asm-sh/tlb_64.h
+++ b/include/asm-sh/tlb_64.h
@@ -56,6 +56,7 @@
__asm__ __volatile__ ("putcfg %0, 0, r63\n" : : "r" (slot));
}
+#ifdef CONFIG_MMU
/* arch/sh64/mm/tlb.c */
int sh64_tlb_init(void);
unsigned long long sh64_next_free_dtlb_entry(void);
@@ -64,6 +65,13 @@
void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr,
unsigned long asid, unsigned long paddr);
void sh64_teardown_tlb_slot(unsigned long long config_addr);
-
+#else
+#define sh64_tlb_init() do { } while (0)
+#define sh64_next_free_dtlb_entry() (0)
+#define sh64_get_wired_dtlb_entry() (0)
+#define sh64_put_wired_dtlb_entry(entry) do { } while (0)
+#define sh64_setup_tlb_slot(conf, virt, asid, phys) do { } while (0)
+#define sh64_teardown_tlb_slot(addr) do { } while (0)
+#endif /* CONFIG_MMU */
#endif /* __ASSEMBLY__ */
#endif /* __ASM_SH_TLB_64_H */
diff --git a/include/asm-sh/topology.h b/include/asm-sh/topology.h
index 34cdb28..95f0085 100644
--- a/include/asm-sh/topology.h
+++ b/include/asm-sh/topology.h
@@ -29,6 +29,17 @@
.nr_balance_failed = 0, \
}
+#define cpu_to_node(cpu) ((void)(cpu),0)
+#define parent_node(node) ((void)(node),0)
+
+#define node_to_cpumask(node) ((void)node, cpu_online_map)
+#define node_to_first_cpu(node) ((void)(node),0)
+
+#define pcibus_to_node(bus) ((void)(bus), -1)
+#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \
+ CPU_MASK_ALL : \
+ node_to_cpumask(pcibus_to_node(bus)) \
+ )
#endif
#include <asm-generic/topology.h>
diff --git a/include/asm-sh/uaccess_64.h b/include/asm-sh/uaccess_64.h
index f956b7b..a9b68d0 100644
--- a/include/asm-sh/uaccess_64.h
+++ b/include/asm-sh/uaccess_64.h
@@ -274,7 +274,9 @@
unsigned long insn, fixup;
};
+#ifdef CONFIG_MMU
#define ARCH_HAS_SEARCH_EXTABLE
+#endif
/* Returns 0 if exception not found and fixup.unit otherwise. */
extern unsigned long search_exception_table(unsigned long addr);
diff --git a/include/asm-x86/bitops.h b/include/asm-x86/bitops.h
index b81a4d4..ee4b3ea 100644
--- a/include/asm-x86/bitops.h
+++ b/include/asm-x86/bitops.h
@@ -23,13 +23,10 @@
#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1)
/* Technically wrong, but this avoids compilation errors on some gcc
versions. */
-#define ADDR "=m" (*(volatile long *)addr)
-#define BIT_ADDR "=m" (((volatile int *)addr)[nr >> 5])
+#define ADDR "=m" (*(volatile long *) addr)
#else
#define ADDR "+m" (*(volatile long *) addr)
-#define BIT_ADDR "+m" (((volatile int *)addr)[nr >> 5])
#endif
-#define BASE_ADDR "m" (*(volatile int *)addr)
/**
* set_bit - Atomically set a bit in memory
@@ -77,7 +74,7 @@
*/
static inline void clear_bit(int nr, volatile void *addr)
{
- asm volatile(LOCK_PREFIX "btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
+ asm volatile(LOCK_PREFIX "btr %1,%0" : ADDR : "Ir" (nr));
}
/*
@@ -96,7 +93,7 @@
static inline void __clear_bit(int nr, volatile void *addr)
{
- asm volatile("btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
+ asm volatile("btr %1,%0" : ADDR : "Ir" (nr));
}
/*
@@ -131,7 +128,7 @@
*/
static inline void __change_bit(int nr, volatile void *addr)
{
- asm volatile("btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
+ asm volatile("btc %1,%0" : ADDR : "Ir" (nr));
}
/**
@@ -145,7 +142,7 @@
*/
static inline void change_bit(int nr, volatile void *addr)
{
- asm volatile(LOCK_PREFIX "btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
+ asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr));
}
/**
@@ -191,9 +188,10 @@
{
int oldbit;
- asm volatile("bts %2,%3\n\t"
- "sbb %0,%0"
- : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR);
+ asm("bts %2,%1\n\t"
+ "sbb %0,%0"
+ : "=r" (oldbit), ADDR
+ : "Ir" (nr));
return oldbit;
}
@@ -229,9 +227,10 @@
{
int oldbit;
- asm volatile("btr %2,%3\n\t"
+ asm volatile("btr %2,%1\n\t"
"sbb %0,%0"
- : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR);
+ : "=r" (oldbit), ADDR
+ : "Ir" (nr));
return oldbit;
}
@@ -240,9 +239,10 @@
{
int oldbit;
- asm volatile("btc %2,%3\n\t"
+ asm volatile("btc %2,%1\n\t"
"sbb %0,%0"
- : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR);
+ : "=r" (oldbit), ADDR
+ : "Ir" (nr) : "memory");
return oldbit;
}
@@ -276,11 +276,10 @@
{
int oldbit;
- asm volatile("bt %2,%3\n\t"
+ asm volatile("bt %2,%1\n\t"
"sbb %0,%0"
: "=r" (oldbit)
- : "m" (((volatile const int *)addr)[nr >> 5]),
- "Ir" (nr), BASE_ADDR);
+ : "m" (*(unsigned long *)addr), "Ir" (nr));
return oldbit;
}
@@ -397,8 +396,6 @@
}
#endif /* __KERNEL__ */
-#undef BASE_ADDR
-#undef BIT_ADDR
#undef ADDR
static inline void set_bit_string(unsigned long *bitmap,
diff --git a/include/asm-x86/geode.h b/include/asm-x86/geode.h
index 7154dc4..6e64588 100644
--- a/include/asm-x86/geode.h
+++ b/include/asm-x86/geode.h
@@ -185,16 +185,14 @@
return (is_geode_gx() || is_geode_lx());
}
-/*
- * The VSA has virtual registers that we can query for a signature.
- */
+#ifdef CONFIG_MGEODE_LX
+extern int geode_has_vsa2(void);
+#else
static inline int geode_has_vsa2(void)
{
- outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
- outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
-
- return (inw(VSA_VRC_DATA) == VSA_SIG);
+ return 0;
}
+#endif
/* MFGPTs */
diff --git a/include/asm-x86/i387.h b/include/asm-x86/i387.h
index da2adb4..6b722d3 100644
--- a/include/asm-x86/i387.h
+++ b/include/asm-x86/i387.h
@@ -175,7 +175,15 @@
*/
static inline int restore_i387(struct _fpstate __user *buf)
{
- set_used_math();
+ struct task_struct *tsk = current;
+ int err;
+
+ if (!used_math()) {
+ err = init_fpu(tsk);
+ if (err)
+ return err;
+ }
+
if (!(task_thread_info(current)->status & TS_USEDFPU)) {
clts();
task_thread_info(current)->status |= TS_USEDFPU;
diff --git a/include/asm-x86/pat.h b/include/asm-x86/pat.h
index 8b822b5..88f60cc 100644
--- a/include/asm-x86/pat.h
+++ b/include/asm-x86/pat.h
@@ -4,7 +4,13 @@
#include <linux/types.h>
+#ifdef CONFIG_X86_PAT
extern int pat_wc_enabled;
+extern void validate_pat_support(struct cpuinfo_x86 *c);
+#else
+static const int pat_wc_enabled = 0;
+static inline void validate_pat_support(struct cpuinfo_x86 *c) { }
+#endif
extern void pat_init(void);
@@ -12,5 +18,7 @@
unsigned long req_type, unsigned long *ret_type);
extern int free_memtype(u64 start, u64 end);
+extern void pat_disable(char *reason);
+
#endif
diff --git a/include/asm-x86/spinlock.h b/include/asm-x86/spinlock.h
index bc6376f..21e89bf 100644
--- a/include/asm-x86/spinlock.h
+++ b/include/asm-x86/spinlock.h
@@ -20,18 +20,8 @@
*/
#ifdef CONFIG_X86_32
-typedef char _slock_t;
-# define LOCK_INS_DEC "decb"
-# define LOCK_INS_XCH "xchgb"
-# define LOCK_INS_MOV "movb"
-# define LOCK_INS_CMP "cmpb"
# define LOCK_PTR_REG "a"
#else
-typedef int _slock_t;
-# define LOCK_INS_DEC "decl"
-# define LOCK_INS_XCH "xchgl"
-# define LOCK_INS_MOV "movl"
-# define LOCK_INS_CMP "cmpl"
# define LOCK_PTR_REG "D"
#endif
@@ -66,14 +56,14 @@
#if (NR_CPUS < 256)
static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
{
- int tmp = *(volatile signed int *)(&(lock)->slock);
+ int tmp = ACCESS_ONCE(lock->slock);
return (((tmp >> 8) & 0xff) != (tmp & 0xff));
}
static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
{
- int tmp = *(volatile signed int *)(&(lock)->slock);
+ int tmp = ACCESS_ONCE(lock->slock);
return (((tmp >> 8) & 0xff) - (tmp & 0xff)) > 1;
}
@@ -130,14 +120,14 @@
#else
static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
{
- int tmp = *(volatile signed int *)(&(lock)->slock);
+ int tmp = ACCESS_ONCE(lock->slock);
return (((tmp >> 16) & 0xffff) != (tmp & 0xffff));
}
static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
{
- int tmp = *(volatile signed int *)(&(lock)->slock);
+ int tmp = ACCESS_ONCE(lock->slock);
return (((tmp >> 16) & 0xffff) - (tmp & 0xffff)) > 1;
}
diff --git a/include/asm-x86/topology.h b/include/asm-x86/topology.h
index 4f35a0f..dcf3f81 100644
--- a/include/asm-x86/topology.h
+++ b/include/asm-x86/topology.h
@@ -25,6 +25,16 @@
#ifndef _ASM_X86_TOPOLOGY_H
#define _ASM_X86_TOPOLOGY_H
+#ifdef CONFIG_X86_32
+# ifdef CONFIG_X86_HT
+# define ENABLE_TOPO_DEFINES
+# endif
+#else
+# ifdef CONFIG_SMP
+# define ENABLE_TOPO_DEFINES
+# endif
+#endif
+
#ifdef CONFIG_NUMA
#include <linux/cpumask.h>
#include <asm/mpspec.h>
@@ -130,10 +140,6 @@
extern unsigned long node_remap_size[];
#define node_has_online_mem(nid) (node_start_pfn[nid] != node_end_pfn[nid])
-# ifdef CONFIG_X86_HT
-# define ENABLE_TOPO_DEFINES
-# endif
-
# define SD_CACHE_NICE_TRIES 1
# define SD_IDLE_IDX 1
# define SD_NEWIDLE_IDX 2
@@ -141,10 +147,6 @@
#else
-# ifdef CONFIG_SMP
-# define ENABLE_TOPO_DEFINES
-# endif
-
# define SD_CACHE_NICE_TRIES 2
# define SD_IDLE_IDX 2
# define SD_NEWIDLE_IDX 2
diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index dcae0c8..c8bd2da 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -182,4 +182,16 @@
# define __section(S) __attribute__ ((__section__(#S)))
#endif
+/*
+ * Prevent the compiler from merging or refetching accesses. The compiler
+ * is also forbidden from reordering successive instances of ACCESS_ONCE(),
+ * but only when the compiler is aware of some particular ordering. One way
+ * to make the compiler aware of ordering is to put the two invocations of
+ * ACCESS_ONCE() in different C statements.
+ *
+ * This macro does absolutely -nothing- to prevent the CPU from reordering,
+ * merging, or refetching absolutely anything at any time.
+ */
+#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
+
#endif /* __LINUX_COMPILER_H */
diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h
index 897f723..181006c 100644
--- a/include/linux/hardirq.h
+++ b/include/linux/hardirq.h
@@ -72,6 +72,14 @@
#define in_softirq() (softirq_count())
#define in_interrupt() (irq_count())
+#if defined(CONFIG_PREEMPT)
+# define PREEMPT_INATOMIC_BASE kernel_locked()
+# define PREEMPT_CHECK_OFFSET 1
+#else
+# define PREEMPT_INATOMIC_BASE 0
+# define PREEMPT_CHECK_OFFSET 0
+#endif
+
/*
* Are we running in atomic context? WARNING: this macro cannot
* always detect atomic context; in particular, it cannot know about
@@ -79,17 +87,11 @@
* used in the general case to determine whether sleeping is possible.
* Do not use in_atomic() in driver code.
*/
-#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != 0)
-
-#ifdef CONFIG_PREEMPT
-# define PREEMPT_CHECK_OFFSET 1
-#else
-# define PREEMPT_CHECK_OFFSET 0
-#endif
+#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_INATOMIC_BASE)
/*
* Check whether we were atomic before we did preempt_disable():
- * (used by the scheduler)
+ * (used by the scheduler, *after* releasing the kernel lock)
*/
#define in_atomic_preempt_off() \
((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET)
diff --git a/include/linux/of_i2c.h b/include/linux/of_i2c.h
index 2e5a967..bd2a870 100644
--- a/include/linux/of_i2c.h
+++ b/include/linux/of_i2c.h
@@ -14,11 +14,7 @@
#include <linux/i2c.h>
-#ifdef CONFIG_OF_I2C
-
void of_register_i2c_devices(struct i2c_adapter *adap,
struct device_node *adap_node);
-#endif /* CONFIG_OF_I2C */
-
#endif /* __LINUX_OF_I2C_H */
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index 8082d65..d42dbec 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -131,18 +131,6 @@
*/
#define rcu_read_unlock_bh() __rcu_read_unlock_bh()
-/*
- * Prevent the compiler from merging or refetching accesses. The compiler
- * is also forbidden from reordering successive instances of ACCESS_ONCE(),
- * but only when the compiler is aware of some particular ordering. One way
- * to make the compiler aware of ordering is to put the two invocations of
- * ACCESS_ONCE() in different C statements.
- *
- * This macro does absolutely -nothing- to prevent the CPU from reordering,
- * merging, or refetching absolutely anything at any time.
- */
-#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
-
/**
* rcu_dereference - fetch an RCU-protected pointer in an
* RCU read-side critical section. This pointer may later
diff --git a/include/linux/vermagic.h b/include/linux/vermagic.h
index 4d0909e..79b9837 100644
--- a/include/linux/vermagic.h
+++ b/include/linux/vermagic.h
@@ -17,6 +17,11 @@
#else
#define MODULE_VERMAGIC_MODULE_UNLOAD ""
#endif
+#ifdef CONFIG_MODVERSIONS
+#define MODULE_VERMAGIC_MODVERSIONS "modversions "
+#else
+#define MODULE_VERMAGIC_MODVERSIONS ""
+#endif
#ifndef MODULE_ARCH_VERMAGIC
#define MODULE_ARCH_VERMAGIC ""
#endif
@@ -24,5 +29,6 @@
#define VERMAGIC_STRING \
UTS_RELEASE " " \
MODULE_VERMAGIC_SMP MODULE_VERMAGIC_PREEMPT \
- MODULE_VERMAGIC_MODULE_UNLOAD MODULE_ARCH_VERMAGIC
+ MODULE_VERMAGIC_MODULE_UNLOAD MODULE_VERMAGIC_MODVERSIONS \
+ MODULE_ARCH_VERMAGIC
diff --git a/init/Kconfig b/init/Kconfig
index 3b5adbf..6135d07 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -845,9 +845,9 @@
depends on MODULES
default n
help
- This option allows loading of modules even if that would set the
- 'F' (forced) taint, due to lack of version info. Which is
- usually a really bad idea.
+ Allow loading of modules without version information (ie. modprobe
+ --force). Forced module loading sets the 'F' (forced) taint flag and
+ is usually a really bad idea.
config MODULE_UNLOAD
bool "Module unloading"
diff --git a/kernel/module.c b/kernel/module.c
index 8e4528c..f5e9491 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -917,6 +917,10 @@
if (!crc)
return 1;
+ /* No versions at all? modprobe --force does this. */
+ if (versindex == 0)
+ return try_to_force_load(mod, symname) == 0;
+
versions = (void *) sechdrs[versindex].sh_addr;
num_versions = sechdrs[versindex].sh_size
/ sizeof(struct modversion_info);
@@ -932,8 +936,9 @@
goto bad_version;
}
- if (!try_to_force_load(mod, symname))
- return 1;
+ printk(KERN_WARNING "%s: no symbol version for %s\n",
+ mod->name, symname);
+ return 0;
bad_version:
printk("%s: disagrees about version of symbol %s\n",
@@ -952,11 +957,14 @@
return check_version(sechdrs, versindex, "struct_module", mod, crc);
}
-/* First part is kernel version, which we ignore. */
-static inline int same_magic(const char *amagic, const char *bmagic)
+/* First part is kernel version, which we ignore if module has crcs. */
+static inline int same_magic(const char *amagic, const char *bmagic,
+ bool has_crcs)
{
- amagic += strcspn(amagic, " ");
- bmagic += strcspn(bmagic, " ");
+ if (has_crcs) {
+ amagic += strcspn(amagic, " ");
+ bmagic += strcspn(bmagic, " ");
+ }
return strcmp(amagic, bmagic) == 0;
}
#else
@@ -976,7 +984,8 @@
return 1;
}
-static inline int same_magic(const char *amagic, const char *bmagic)
+static inline int same_magic(const char *amagic, const char *bmagic,
+ bool has_crcs)
{
return strcmp(amagic, bmagic) == 0;
}
@@ -1869,7 +1878,7 @@
err = try_to_force_load(mod, "magic");
if (err)
goto free_hdr;
- } else if (!same_magic(modmagic, vermagic)) {
+ } else if (!same_magic(modmagic, vermagic, versindex)) {
printk(KERN_ERR "%s: version magic '%s' should be '%s'\n",
mod->name, modmagic, vermagic);
err = -ENOEXEC;
diff --git a/kernel/sched.c b/kernel/sched.c
index 58fb8af..c51b656 100644
--- a/kernel/sched.c
+++ b/kernel/sched.c
@@ -4567,8 +4567,6 @@
asmlinkage void __sched preempt_schedule(void)
{
struct thread_info *ti = current_thread_info();
- struct task_struct *task = current;
- int saved_lock_depth;
/*
* If there is a non-zero preempt_count or interrupts are disabled,
@@ -4579,16 +4577,7 @@
do {
add_preempt_count(PREEMPT_ACTIVE);
-
- /*
- * We keep the big kernel semaphore locked, but we
- * clear ->lock_depth so that schedule() doesnt
- * auto-release the semaphore:
- */
- saved_lock_depth = task->lock_depth;
- task->lock_depth = -1;
schedule();
- task->lock_depth = saved_lock_depth;
sub_preempt_count(PREEMPT_ACTIVE);
/*
@@ -4609,26 +4598,15 @@
asmlinkage void __sched preempt_schedule_irq(void)
{
struct thread_info *ti = current_thread_info();
- struct task_struct *task = current;
- int saved_lock_depth;
/* Catch callers which need to be fixed */
BUG_ON(ti->preempt_count || !irqs_disabled());
do {
add_preempt_count(PREEMPT_ACTIVE);
-
- /*
- * We keep the big kernel semaphore locked, but we
- * clear ->lock_depth so that schedule() doesnt
- * auto-release the semaphore:
- */
- saved_lock_depth = task->lock_depth;
- task->lock_depth = -1;
local_irq_enable();
schedule();
local_irq_disable();
- task->lock_depth = saved_lock_depth;
sub_preempt_count(PREEMPT_ACTIVE);
/*
@@ -5853,8 +5831,11 @@
spin_unlock_irqrestore(&rq->lock, flags);
/* Set the preempt count _outside_ the spinlocks! */
+#if defined(CONFIG_PREEMPT)
+ task_thread_info(idle)->preempt_count = (idle->lock_depth >= 0);
+#else
task_thread_info(idle)->preempt_count = 0;
-
+#endif
/*
* The idle tasks have their own, simple scheduling class:
*/
diff --git a/kernel/semaphore.c b/kernel/semaphore.c
index 5e41217..5c2942e 100644
--- a/kernel/semaphore.c
+++ b/kernel/semaphore.c
@@ -54,9 +54,10 @@
unsigned long flags;
spin_lock_irqsave(&sem->lock, flags);
- if (unlikely(!sem->count))
+ if (likely(sem->count > 0))
+ sem->count--;
+ else
__down(sem);
- sem->count--;
spin_unlock_irqrestore(&sem->lock, flags);
}
EXPORT_SYMBOL(down);
@@ -76,10 +77,10 @@
int result = 0;
spin_lock_irqsave(&sem->lock, flags);
- if (unlikely(!sem->count))
- result = __down_interruptible(sem);
- if (!result)
+ if (likely(sem->count > 0))
sem->count--;
+ else
+ result = __down_interruptible(sem);
spin_unlock_irqrestore(&sem->lock, flags);
return result;
@@ -102,10 +103,10 @@
int result = 0;
spin_lock_irqsave(&sem->lock, flags);
- if (unlikely(!sem->count))
- result = __down_killable(sem);
- if (!result)
+ if (likely(sem->count > 0))
sem->count--;
+ else
+ result = __down_killable(sem);
spin_unlock_irqrestore(&sem->lock, flags);
return result;
@@ -156,10 +157,10 @@
int result = 0;
spin_lock_irqsave(&sem->lock, flags);
- if (unlikely(!sem->count))
- result = __down_timeout(sem, jiffies);
- if (!result)
+ if (likely(sem->count > 0))
sem->count--;
+ else
+ result = __down_timeout(sem, jiffies);
spin_unlock_irqrestore(&sem->lock, flags);
return result;
@@ -178,8 +179,9 @@
unsigned long flags;
spin_lock_irqsave(&sem->lock, flags);
- sem->count++;
- if (unlikely(!list_empty(&sem->wait_list)))
+ if (likely(list_empty(&sem->wait_list)))
+ sem->count++;
+ else
__up(sem);
spin_unlock_irqrestore(&sem->lock, flags);
}
@@ -190,6 +192,7 @@
struct semaphore_waiter {
struct list_head list;
struct task_struct *task;
+ int up;
};
/*
@@ -202,34 +205,33 @@
{
struct task_struct *task = current;
struct semaphore_waiter waiter;
- int ret = 0;
- waiter.task = task;
list_add_tail(&waiter.list, &sem->wait_list);
+ waiter.task = task;
+ waiter.up = 0;
for (;;) {
- if (state == TASK_INTERRUPTIBLE && signal_pending(task)) {
- ret = -EINTR;
- break;
- }
- if (state == TASK_KILLABLE && fatal_signal_pending(task)) {
- ret = -EINTR;
- break;
- }
- if (timeout <= 0) {
- ret = -ETIME;
- break;
- }
+ if (state == TASK_INTERRUPTIBLE && signal_pending(task))
+ goto interrupted;
+ if (state == TASK_KILLABLE && fatal_signal_pending(task))
+ goto interrupted;
+ if (timeout <= 0)
+ goto timed_out;
__set_task_state(task, state);
spin_unlock_irq(&sem->lock);
timeout = schedule_timeout(timeout);
spin_lock_irq(&sem->lock);
- if (sem->count > 0)
- break;
+ if (waiter.up)
+ return 0;
}
+ timed_out:
list_del(&waiter.list);
- return ret;
+ return -ETIME;
+
+ interrupted:
+ list_del(&waiter.list);
+ return -EINTR;
}
static noinline void __sched __down(struct semaphore *sem)
@@ -256,5 +258,7 @@
{
struct semaphore_waiter *waiter = list_first_entry(&sem->wait_list,
struct semaphore_waiter, list);
+ list_del(&waiter->list);
+ waiter->up = 1;
wake_up_process(waiter->task);
}
diff --git a/lib/kernel_lock.c b/lib/kernel_lock.c
index cd3e825..01a3c22 100644
--- a/lib/kernel_lock.c
+++ b/lib/kernel_lock.c
@@ -11,79 +11,121 @@
#include <linux/semaphore.h>
/*
- * The 'big kernel semaphore'
+ * The 'big kernel lock'
*
- * This mutex is taken and released recursively by lock_kernel()
+ * This spinlock is taken and released recursively by lock_kernel()
* and unlock_kernel(). It is transparently dropped and reacquired
* over schedule(). It is used to protect legacy code that hasn't
* been migrated to a proper locking design yet.
*
- * Note: code locked by this semaphore will only be serialized against
- * other code using the same locking facility. The code guarantees that
- * the task remains on the same CPU.
- *
* Don't use in new code.
*/
-static DECLARE_MUTEX(kernel_sem);
+static __cacheline_aligned_in_smp DEFINE_SPINLOCK(kernel_flag);
+
/*
- * Re-acquire the kernel semaphore.
+ * Acquire/release the underlying lock from the scheduler.
*
- * This function is called with preemption off.
+ * This is called with preemption disabled, and should
+ * return an error value if it cannot get the lock and
+ * TIF_NEED_RESCHED gets set.
*
- * We are executing in schedule() so the code must be extremely careful
- * about recursion, both due to the down() and due to the enabling of
- * preemption. schedule() will re-check the preemption flag after
- * reacquiring the semaphore.
+ * If it successfully gets the lock, it should increment
+ * the preemption count like any spinlock does.
+ *
+ * (This works on UP too - _raw_spin_trylock will never
+ * return false in that case)
*/
int __lockfunc __reacquire_kernel_lock(void)
{
- struct task_struct *task = current;
- int saved_lock_depth = task->lock_depth;
-
- BUG_ON(saved_lock_depth < 0);
-
- task->lock_depth = -1;
- preempt_enable_no_resched();
-
- down(&kernel_sem);
-
+ while (!_raw_spin_trylock(&kernel_flag)) {
+ if (test_thread_flag(TIF_NEED_RESCHED))
+ return -EAGAIN;
+ cpu_relax();
+ }
preempt_disable();
- task->lock_depth = saved_lock_depth;
-
return 0;
}
void __lockfunc __release_kernel_lock(void)
{
- up(&kernel_sem);
+ _raw_spin_unlock(&kernel_flag);
+ preempt_enable_no_resched();
}
/*
- * Getting the big kernel semaphore.
+ * These are the BKL spinlocks - we try to be polite about preemption.
+ * If SMP is not on (ie UP preemption), this all goes away because the
+ * _raw_spin_trylock() will always succeed.
+ */
+#ifdef CONFIG_PREEMPT
+static inline void __lock_kernel(void)
+{
+ preempt_disable();
+ if (unlikely(!_raw_spin_trylock(&kernel_flag))) {
+ /*
+ * If preemption was disabled even before this
+ * was called, there's nothing we can be polite
+ * about - just spin.
+ */
+ if (preempt_count() > 1) {
+ _raw_spin_lock(&kernel_flag);
+ return;
+ }
+
+ /*
+ * Otherwise, let's wait for the kernel lock
+ * with preemption enabled..
+ */
+ do {
+ preempt_enable();
+ while (spin_is_locked(&kernel_flag))
+ cpu_relax();
+ preempt_disable();
+ } while (!_raw_spin_trylock(&kernel_flag));
+ }
+}
+
+#else
+
+/*
+ * Non-preemption case - just get the spinlock
+ */
+static inline void __lock_kernel(void)
+{
+ _raw_spin_lock(&kernel_flag);
+}
+#endif
+
+static inline void __unlock_kernel(void)
+{
+ /*
+ * the BKL is not covered by lockdep, so we open-code the
+ * unlocking sequence (and thus avoid the dep-chain ops):
+ */
+ _raw_spin_unlock(&kernel_flag);
+ preempt_enable();
+}
+
+/*
+ * Getting the big kernel lock.
+ *
+ * This cannot happen asynchronously, so we only need to
+ * worry about other CPU's.
*/
void __lockfunc lock_kernel(void)
{
- struct task_struct *task = current;
- int depth = task->lock_depth + 1;
-
+ int depth = current->lock_depth+1;
if (likely(!depth))
- /*
- * No recursion worries - we set up lock_depth _after_
- */
- down(&kernel_sem);
-
- task->lock_depth = depth;
+ __lock_kernel();
+ current->lock_depth = depth;
}
void __lockfunc unlock_kernel(void)
{
- struct task_struct *task = current;
-
- BUG_ON(task->lock_depth < 0);
-
- if (likely(--task->lock_depth < 0))
- up(&kernel_sem);
+ BUG_ON(current->lock_depth < 0);
+ if (likely(--current->lock_depth < 0))
+ __unlock_kernel();
}
EXPORT_SYMBOL(lock_kernel);
diff --git a/net/ipv6/sit.c b/net/ipv6/sit.c
index 4b2f103..5a6fab9 100644
--- a/net/ipv6/sit.c
+++ b/net/ipv6/sit.c
@@ -596,9 +596,9 @@
}
icmp_send(skb, ICMP_DEST_UNREACH, ICMP_PORT_UNREACH, 0);
- kfree_skb(skb);
read_unlock(&ipip6_lock);
out:
+ kfree_skb(skb);
return 0;
}
diff --git a/net/tipc/core.h b/net/tipc/core.h
index 325404f..5a0e487 100644
--- a/net/tipc/core.h
+++ b/net/tipc/core.h
@@ -279,15 +279,14 @@
/*
* TIPC message buffer code
*
- * TIPC message buffer headroom reserves space for a link-level header
- * (in case the message is sent off-node),
- * while ensuring TIPC header is word aligned for quicker access
+ * TIPC message buffer headroom reserves space for the worst-case
+ * link-level device header (in case the message is sent off-node).
*
- * The largest header currently supported is 18 bytes, which is used when
- * the standard 14 byte Ethernet header has 4 added bytes for VLAN info
+ * Note: Headroom should be a multiple of 4 to ensure the TIPC header fields
+ * are word aligned for quicker access
*/
-#define BUF_HEADROOM 20u
+#define BUF_HEADROOM LL_MAX_HEADER
struct tipc_skb_cb {
void *handle;