| commit | 5b2acf384c8a8707d32a98106192ee7187e4446d | [log] [tgz] |
|---|---|---|
| author | Shawn Guo <shawn.guo@linaro.org> | Fri Dec 30 16:16:07 2011 +0800 |
| committer | Shawn Guo <shawn.guo@linaro.org> | Fri Dec 30 16:16:07 2011 +0800 |
| tree | 568cc0c99cc25e0003c26e62e50f94ce5c2bd2eb | |
| parent | 5f0a6e2d503896062f641639dacfe5055c2f593b [diff] |
ARM: imx6: fix v7_invalidate_l1 by adding I-Cache invalidation The recent suspend/resume and reset testing on imx6q discovers that not only D-Cache but also I-Cache has random data and validity when the core comes out of a power recycle. This patch adds I-Cache invalidation into v7_invalidate_l1 to make sure both D-Cache and I-Cache invalidated on power-up. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>