[ARM] 4777/1: S3C24XX: Ensure clk_set_rate() checks the set_rate method for the clk
Add checks for clk_set_rate() and ensure that we do not allow set_rate
to be called for a clock that does not have it defined. Add default
methods for fclk, hclk, pclk and mpll.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c
index 79cda0f..99a4474 100644
--- a/arch/arm/plat-s3c24xx/clock.c
+++ b/arch/arm/plat-s3c24xx/clock.c
@@ -172,6 +172,15 @@
if (IS_ERR(clk))
return -EINVAL;
+ /* We do not default just do a clk->rate = rate as
+ * the clock may have been made this way by choice.
+ */
+
+ WARN_ON(clk->set_rate == NULL);
+
+ if (clk->set_rate == NULL)
+ return -EINVAL;
+
mutex_lock(&clocks_mutex);
ret = (clk->set_rate)(clk, rate);
mutex_unlock(&clocks_mutex);
@@ -213,6 +222,12 @@
/* base clocks */
+static int clk_default_setrate(struct clk *clk, unsigned long rate)
+{
+ clk->rate = rate;
+ return 0;
+}
+
struct clk clk_xtal = {
.name = "xtal",
.id = -1,
@@ -224,6 +239,7 @@
struct clk clk_mpll = {
.name = "mpll",
.id = -1,
+ .set_rate = clk_default_setrate,
};
struct clk clk_upll = {
@@ -239,6 +255,7 @@
.rate = 0,
.parent = &clk_mpll,
.ctrlbit = 0,
+ .set_rate = clk_default_setrate,
};
struct clk clk_h = {
@@ -247,6 +264,7 @@
.rate = 0,
.parent = NULL,
.ctrlbit = 0,
+ .set_rate = clk_default_setrate,
};
struct clk clk_p = {
@@ -255,6 +273,7 @@
.rate = 0,
.parent = NULL,
.ctrlbit = 0,
+ .set_rate = clk_default_setrate,
};
struct clk clk_usb_bus = {