| commit | 55249baaa5cd188ebd9acdb047eeaed8092e4a93 | [log] [tgz] |
|---|---|---|
| author | Chris Wilson <chris@chris-wilson.co.uk> | Wed Dec 22 14:04:47 2010 +0000 |
| committer | Chris Wilson <chris@chris-wilson.co.uk> | Tue Jan 11 20:35:41 2011 +0000 |
| tree | ec52e1bdb516ce0bd259614b3c068960450b9236 | |
| parent | 35c3047ad15849335242b847c94f180ef45db490 [diff] |
drm/i915: Workaround erratum on i830 for TAIL pointer within last 2 cachelines On i830 if the tail pointer is set to within 2 cachelines of the end of the buffer, the chip may hang. So instead if the tail were to land in that location, we pad the end of the buffer with NOPs, and start again at the beginning. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>