tree ccda1ff7b189afc970bce971a3e53651f2013281
parent fb35c6b60e6db1e8ae0d7d358b76f3f511bf2707
author Thierry Reding <treding@nvidia.com> 1418052314 +0100
committer Thierry Reding <treding@nvidia.com> 1422350077 +0100

drm/tegra: hdmi: Registers are 32-bit

Use a sized unsigned 32-bit data type (u32) to store register contents.
The HDMI registers are 32 bits wide irrespective of the architecture's
data width.

Signed-off-by: Thierry Reding <treding@nvidia.com>