tree 316ae10e4705f42a0690d44254be218c4bedbc03
parent 1745c1ef88c095a99c95d13b275774d18774465d
author Steven J. Hill <Steven.Hill@imgtec.com> 1384445544 +0000
committer Ralf Baechle <ralf@linux-mips.org> 1390418338 +0100

MIPS: features: Add initial support for Segmentation Control registers

MIPS32R3 introduced a new set of Segmentation Control registers which
increase the flexibility of the segmented-based memory scheme.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6131/