sparc64: Use fsrc2 instead of fsrc1 in sparc64 hash crypto drivers.
On SPARC-T4 fsrc2 has 1 cycle of latency, whereas fsrc1 has 11 cycles.
True story.
Signed-off-by: David S. Miller <davem@davemloft.net>
diff --git a/arch/sparc/crypto/md5_asm.S b/arch/sparc/crypto/md5_asm.S
index 220b73b..ff90903 100644
--- a/arch/sparc/crypto/md5_asm.S
+++ b/arch/sparc/crypto/md5_asm.S
@@ -62,7 +62,7 @@
.word 0x81b02800
subcc %o2, 1, %o2
- fsrc1 %f26, %f10
+ fsrc2 %f26, %f10
bne,pt %xcc, 1b
add %o1, 0x40, %o1
diff --git a/arch/sparc/crypto/sha1_asm.S b/arch/sparc/crypto/sha1_asm.S
index d2147eb..3cd218a 100644
--- a/arch/sparc/crypto/sha1_asm.S
+++ b/arch/sparc/crypto/sha1_asm.S
@@ -64,7 +64,7 @@
.word 0x81b02820
subcc %o2, 1, %o2
- fsrc1 %f26, %f10
+ fsrc2 %f26, %f10
bne,pt %xcc, 1b
add %o1, 0x40, %o1
diff --git a/arch/sparc/crypto/sha256_asm.S b/arch/sparc/crypto/sha256_asm.S
index 771ce26..9da84f5 100644
--- a/arch/sparc/crypto/sha256_asm.S
+++ b/arch/sparc/crypto/sha256_asm.S
@@ -70,7 +70,7 @@
.word 0x81b02840
subcc %o2, 1, %o2
- fsrc1 %f26, %f10
+ fsrc2 %f26, %f10
bne,pt %xcc, 1b
add %o1, 0x40, %o1
diff --git a/arch/sparc/crypto/sha512_asm.S b/arch/sparc/crypto/sha512_asm.S
index 04244da..650ba57 100644
--- a/arch/sparc/crypto/sha512_asm.S
+++ b/arch/sparc/crypto/sha512_asm.S
@@ -94,7 +94,7 @@
.word 0x81b02860
subcc %o2, 1, %o2
- fsrc1 %f50, %f18
+ fsrc2 %f50, %f18
bne,pt %xcc, 1b
add %o1, 0x80, %o1