| commit | 2c4133c5d0e98ea5c7faca780e2b846d10f430c8 | [log] [tgz] |
|---|---|---|
| author | Russell King <rmk+kernel@arm.linux.org.uk> | Wed Mar 19 12:22:34 2014 +0000 |
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | Fri May 30 00:50:28 2014 +0100 |
| tree | b4f5157e92e151eac1988e07862fd9cd9fc0db69 | |
| parent | b28dd4ac66de15c48b00184b63180094f2f7fb45 [diff] |
ARM: l2c: zynq: remove cache size override The cache size should already be present in the L2 cache auxiliary control register: it is part of the integration process to configure the hardware IP. Most platforms get this right, yet still many cargo-cult program, and assume that they always need specifying to the L2 cache code. Remove them so we can find out which really need this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>