diff --git a/include/video/kyro.h b/include/video/kyro.h
index dba7de2..c563968 100644
--- a/include/video/kyro.h
+++ b/include/video/kyro.h
@@ -32,7 +32,7 @@
 	u32 PIXCLK;	/* Pixel Clock       */
 	u32 HCLK;	/* Hor Clock         */
 
-	/* Usefull to hold depth here for Linux */
+	/* Useful to hold depth here for Linux */
 	u8 PIXDEPTH;
 
 #ifdef CONFIG_MTRR
diff --git a/include/video/neomagic.h b/include/video/neomagic.h
index 08b6637..bc5013e 100644
--- a/include/video/neomagic.h
+++ b/include/video/neomagic.h
@@ -129,7 +129,7 @@
 	unsigned char CRTC[25];		/* Crtc Controller */
 	unsigned char Sequencer[5];	/* Video Sequencer */
 	unsigned char Graphics[9];	/* Video Graphics */
-	unsigned char Attribute[21];	/* Video Atribute */
+	unsigned char Attribute[21];	/* Video Attribute */
 
 	unsigned char GeneralLockReg;
 	unsigned char ExtCRTDispAddr;
diff --git a/include/video/newport.h b/include/video/newport.h
index 001b935..3d7c4b4 100644
--- a/include/video/newport.h
+++ b/include/video/newport.h
@@ -5,7 +5,7 @@
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  * 
- * Ulf Carlsson - Compability with the IRIX structures added
+ * Ulf Carlsson - Compatibility with the IRIX structures added
  */
 
 #ifndef _SGI_NEWPORT_H
diff --git a/include/video/sisfb.h b/include/video/sisfb.h
index fdd74f1..6dc5df9 100644
--- a/include/video/sisfb.h
+++ b/include/video/sisfb.h
@@ -151,7 +151,7 @@
 	__u32  sisfb_result[4];
 };
 
-/* Addtional IOCTLs for communication sisfb <> X driver                */
+/* Additional IOCTLs for communication sisfb <> X driver                */
 /* If changing this, vgatypes.h must also be changed (for X driver)    */
 
 /* ioctl for identifying and giving some info (esp. memory heap start) */
diff --git a/include/video/sstfb.h b/include/video/sstfb.h
index b52f073..c449eac 100644
--- a/include/video/sstfb.h
+++ b/include/video/sstfb.h
@@ -156,7 +156,7 @@
 #define DAC_READ		FBIINIT2	/* in remap mode */
 #define FBIINIT3		0x021c		/* fbi controls */
 #  define DISABLE_TEXTURE	  BIT(6)
-#  define Y_SWAP_ORIGIN_SHIFT	  22		/* Y swap substraction value */
+#  define Y_SWAP_ORIGIN_SHIFT	  22		/* Y swap subtraction value */
 #define HSYNC			0x0220
 #define VSYNC			0x0224
 #define DAC_DATA		0x022c
@@ -212,9 +212,9 @@
 #  define DACREG_CR0_24BPP	  0x50		/* mode 5 */
 #define	DACREG_CR1_I		0x05
 #define DACREG_CC_I		0x06
-#  define DACREG_CC_CLKA	  BIT(7)	/* clk A controled by regs */
+#  define DACREG_CC_CLKA	  BIT(7)	/* clk A controlled by regs */
 #  define DACREG_CC_CLKA_C	  (2<<4)	/* clk A uses reg C */
-#  define DACREG_CC_CLKB	  BIT(3)	/* clk B controled by regs */
+#  define DACREG_CC_CLKB	  BIT(3)	/* clk B controlled by regs */
 #  define DACREG_CC_CLKB_D	  3		/* clkB uses reg D */
 #define DACREG_AC0_I		0x48		/* clock A reg C */
 #define DACREG_AC1_I		0x49