[ARM] Update show_regs/oops register format
Add the kernel release and version information to the output of
show_regs/oops. Add the CPU PSR register. Avoid using printk
to output partial lines; always output a complete line.
Re-combine the "Control" and "Table + DAC" lines after nommu
separated them; we don't want to waste vertical screen space
needlessly.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 5d6e652..8423617 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -28,6 +28,7 @@
#include <linux/elfcore.h>
#include <linux/pm.h>
#include <linux/tick.h>
+#include <linux/utsname.h>
#include <asm/leds.h>
#include <asm/processor.h>
@@ -199,16 +200,19 @@
void __show_regs(struct pt_regs *regs)
{
- unsigned long flags = condition_codes(regs);
+ unsigned long flags;
+ char buf[64];
- printk("CPU: %d\n", smp_processor_id());
+ printk("CPU: %d %s (%s %.*s)\n",
+ smp_processor_id(), print_tainted(), init_utsname()->release,
+ (int)strcspn(init_utsname()->version, " "),
+ init_utsname()->version);
print_symbol("PC is at %s\n", instruction_pointer(regs));
print_symbol("LR is at %s\n", regs->ARM_lr);
- printk("pc : [<%08lx>] lr : [<%08lx>] %s\n"
+ printk("pc : [<%08lx>] lr : [<%08lx>] psr: %08lx\n"
"sp : %08lx ip : %08lx fp : %08lx\n",
- instruction_pointer(regs),
- regs->ARM_lr, print_tainted(), regs->ARM_sp,
- regs->ARM_ip, regs->ARM_fp);
+ regs->ARM_pc, regs->ARM_lr, regs->ARM_cpsr,
+ regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
printk("r10: %08lx r9 : %08lx r8 : %08lx\n",
regs->ARM_r10, regs->ARM_r9,
regs->ARM_r8);
@@ -218,36 +222,39 @@
printk("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
regs->ARM_r3, regs->ARM_r2,
regs->ARM_r1, regs->ARM_r0);
- printk("Flags: %c%c%c%c",
- flags & PSR_N_BIT ? 'N' : 'n',
- flags & PSR_Z_BIT ? 'Z' : 'z',
- flags & PSR_C_BIT ? 'C' : 'c',
- flags & PSR_V_BIT ? 'V' : 'v');
- printk(" IRQs o%s FIQs o%s Mode %s%s Segment %s\n",
- interrupts_enabled(regs) ? "n" : "ff",
+
+ flags = regs->ARM_cpsr;
+ buf[0] = flags & PSR_N_BIT ? 'N' : 'n';
+ buf[1] = flags & PSR_Z_BIT ? 'Z' : 'z';
+ buf[2] = flags & PSR_C_BIT ? 'C' : 'c';
+ buf[3] = flags & PSR_V_BIT ? 'V' : 'v';
+ buf[4] = '\0';
+
+ printk("Flags: %s IRQs o%s FIQs o%s Mode %s%s Segment %s\n",
+ buf, interrupts_enabled(regs) ? "n" : "ff",
fast_interrupts_enabled(regs) ? "n" : "ff",
processor_modes[processor_mode(regs)],
thumb_mode(regs) ? " (T)" : "",
get_fs() == get_ds() ? "kernel" : "user");
-#if CONFIG_CPU_CP15
+#ifdef CONFIG_CPU_CP15
{
unsigned int ctrl;
- __asm__ (
- " mrc p15, 0, %0, c1, c0\n"
- : "=r" (ctrl));
- printk("Control: %04X\n", ctrl);
- }
+
+ buf[0] = '\0';
#ifdef CONFIG_CPU_CP15_MMU
- {
- unsigned int transbase, dac;
- __asm__ (
- " mrc p15, 0, %0, c2, c0\n"
- " mrc p15, 0, %1, c3, c0\n"
- : "=r" (transbase), "=r" (dac));
- printk("Table: %08X DAC: %08X\n",
- transbase, dac);
- }
+ {
+ unsigned int transbase, dac;
+ asm("mrc p15, 0, %0, c2, c0\n\t"
+ "mrc p15, 0, %1, c3, c0\n"
+ : "=r" (transbase), "=r" (dac));
+ snprintf(buf, sizeof(buf), " Table: %08x DAC: %08x",
+ transbase, dac);
+ }
#endif
+ asm("mrc p15, 0, %0, c1, c0\n" : "=r" (ctrl));
+
+ printk("Control: %08x%s\n", ctrl, buf);
+ }
#endif
}
diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h
index 2d0dad8..ee3d93c 100644
--- a/include/asm-arm/ptrace.h
+++ b/include/asm-arm/ptrace.h
@@ -112,9 +112,6 @@
#define fast_interrupts_enabled(regs) \
(!((regs)->ARM_cpsr & PSR_F_BIT))
-#define condition_codes(regs) \
- ((regs)->ARM_cpsr & (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT))
-
/* Are the current registers suitable for user mode?
* (used to maintain security in signal handlers)
*/