| commit | 123267aae33efd341babe42525b8db51ef32c1b8 | [log] [tgz] |
|---|---|---|
| author | Jingoo Han <jg1.han@samsung.com> | Thu Jul 12 15:10:03 2012 +0900 |
| committer | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | Tue Jul 24 20:54:03 2012 +0000 |
| tree | 590d2ddc5e80d7926b5e18b1015e71cf76b42895 | |
| parent | 2fe2d9f47cfe1a3e66e7d087368b3d7155b04c15 [diff] |
video: exynos_dp: fix wrong DPCD address during Link Training Wrong DPCD addresses were used for clock recovery during Link Training. The training pattern should be set by TRAINING_PATTERN_SET (0x102), while voltage swing and pre-emphasis should be set by TRAINING_LANE0_SET (0x103). Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>