| commit | 0ee958e102b62b418c2fb46c3439d4262067a5fc | [log] [tgz] |
|---|---|---|
| author | Paul Burton <paul.burton@imgtec.com> | Wed Jan 15 10:31:53 2014 +0000 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Wed Mar 26 23:00:12 2014 +0100 |
| tree | e69192dc3112657cdde015ea8a43594a41a24d89 | |
| parent | b86c2247a20f5d8b6f2b3bd0dfd2c9c8c6908b5e [diff] |
MIPS: Coherent Processing System SMP implementation This patch introduces a new SMP implementation for systems implementing the MIPS Coherent Processing System architecture. The kernel will make use of the Coherence Manager, Cluster Power Controller & Global Interrupt Controller in order to detect, bring up & make use of other cores in the system. SMTC is not supported, so only a single TC per VPE in the system is used. That is, this option enables an SMVP style setup but across multiple cores. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6362/ Patchwork: https://patchwork.linux-mips.org/patch/6611/ Patchwork: https://patchwork.linux-mips.org/patch/6651/ Patchwork: https://patchwork.linux-mips.org/patch/6652/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>